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105 lines
4.1 KiB
Batchfile
105 lines
4.1 KiB
Batchfile
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MEMORY
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{
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PAGE 0 :
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/* BEGIN is used for the "boot to SARAM" bootloader mode */
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BEGIN : origin = 0x000000, length = 0x000002
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RAMM0 : origin = 0x0000A2, length = 0x00035E
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RAMD0 : origin = 0x00B000, length = 0x000800
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RAMLS0 : origin = 0x008000, length = 0x000800
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RAMLS1 : origin = 0x008800, length = 0x000800
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RAMLS2 : origin = 0x009000, length = 0x000800
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RAMLS3 : origin = 0x009800, length = 0x000800
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RAMLS4 : origin = 0x00A000, length = 0x000800
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RESET : origin = 0x3FFFC0, length = 0x000002
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/* Flash sectors */
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FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
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FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
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FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
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FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
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FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
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FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
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FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
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FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
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FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
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FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
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FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
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FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
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FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
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FLASHN : origin = 0x0BE000, length = 0x001FF0 /* on-chip Flash */
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// FLASHN_RSVD : origin = 0x0BFFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
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PAGE 1 :
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BOOT_RSVD : origin = 0x000002, length = 0x0000A0 /* Part of M0, BOOT rom will use this for stack */
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RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
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// RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
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RAMD1 : origin = 0x00B800, length = 0x000800
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RAMLS5 : origin = 0x00A800, length = 0x000800
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CANA_MSG_RAM : origin = 0x049000, length = 0x000800
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CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
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CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
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CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
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}
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SECTIONS
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{
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codestart : > BEGIN, PAGE = 0
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.text : >>RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0
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.cinit : > RAMM0, PAGE = 0
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.switch : > RAMM0, PAGE = 0
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.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
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.stack : > RAMM1, PAGE = 1
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#if defined(__TI_EABI__)
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.bss : > RAMLS5, PAGE = 1
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.bss:output : > RAMLS3, PAGE = 0
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.init_array : > RAMM0, PAGE = 0
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.const : > RAMLS5, PAGE = 1
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.data : > RAMLS5, PAGE = 1
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.sysmem : > RAMLS5, PAGE = 1
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#else
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.pinit : > RAMM0, PAGE = 0
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.ebss : > RAMLS5, PAGE = 1
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.econst : > RAMLS5, PAGE = 1
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.esysmem : > RAMLS5, PAGE = 1
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#endif
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#ifdef __TI_COMPILER_VERSION__
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#if __TI_COMPILER_VERSION__ >= 15009000
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.TI.ramfunc : {} > RAMM0, PAGE = 0
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#else
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ramfuncs : > RAMM0 PAGE = 0
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#endif
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#endif
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/* The following section definitions are required when using the IPC API Drivers */
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GROUP : > CPU2TOCPU1RAM, PAGE = 1
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{
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PUTBUFFER
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PUTWRITEIDX
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GETREADIDX
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}
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GROUP : > CPU1TOCPU2RAM, PAGE = 1
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{
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GETBUFFER : TYPE = DSECT
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GETWRITEIDX : TYPE = DSECT
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PUTREADIDX : TYPE = DSECT
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}
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}
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/*
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//===========================================================================
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// End of file.
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//===========================================================================
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*/
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