From 323ecf0802464ab19c6b76a9c6f11633b77ee9a2 Mon Sep 17 00:00:00 2001 From: Gerardo Marx Date: Wed, 21 Oct 2026 10:03:48 -0600 Subject: [PATCH] blank code for cpu1 and general steps --- epwm_cpu1_bitfield/epwm_cpu1_bitfield_main.c | 36 +++++++++++++++++++ .../epwm_cpu2_driverlib_main.c | 19 ++++++++++ 2 files changed, 55 insertions(+) create mode 100644 epwm_cpu1_bitfield/epwm_cpu1_bitfield_main.c create mode 100644 epwm_cpu2_driverlib/epwm_cpu2_driverlib_main.c diff --git a/epwm_cpu1_bitfield/epwm_cpu1_bitfield_main.c b/epwm_cpu1_bitfield/epwm_cpu1_bitfield_main.c new file mode 100644 index 0000000..53f202b --- /dev/null +++ b/epwm_cpu1_bitfield/epwm_cpu1_bitfield_main.c @@ -0,0 +1,36 @@ +/* Gerardo Marx +21/Oct/2026 +Objective: +- ePWM1 (ePWM1A and ePWM1A) and ePWM2 will be controlled CPU1 +- ePWM4 and ePWM5 will be controlled CPU2 +- CPU1: ePWM1 (GPIO0 and GPIO1 outputs), up-count, 10KHz, and D=0.4 +- CPU1: ePWM2 (GPIO2 and GPIO3), up-down, 5KHz, and m=-0.3 +- CPU2: ePWM4 (GPIO6 and GPIO7), up-count, 15KHz, and D=0.6 +- CPU2: ePWM5 (GPIO8 and GPIO8), up-down, 4KHz, and m=+0.7 +*/ + +// libreries +#include "F28x_Project.h" +#include "driverlib.h" +#include "device.h" + +// interrupts + + +//main +void main(void) +{ + // 1. Initialize the system and interrupts + // 2. Select the ePWM clocks and assign CPU ownership + // 3. Enable ePWM1 and ePWM2 clocks + // 4. Stop time-base synchronization + // 5. Configure TB and CC. + // 6. Configure AQ and dead band. + // 7. Configure event trigger and trip-zones. + // 8. Register and enable interrupts. + // 9. Configure PWM GPIOs, diagnostic pin, and X-BAR + // 10. Confirm fault condition and syncronize startup. + + for(;;) { } + +} diff --git a/epwm_cpu2_driverlib/epwm_cpu2_driverlib_main.c b/epwm_cpu2_driverlib/epwm_cpu2_driverlib_main.c new file mode 100644 index 0000000..b5a0f9e --- /dev/null +++ b/epwm_cpu2_driverlib/epwm_cpu2_driverlib_main.c @@ -0,0 +1,19 @@ +/* Gerardo Marx +21/Oct/2026 +Objective: +- ePWM1 (ePWM1A and ePWM1A) and ePWM2 will be controlled CPU1 +- ePWM4 and ePWM5 will be controlled CPU2 +- CPU1: ePWM1 (GPIO0 and GPIO1 outputs), up-count, 10KHz, and D=0.4 +- CPU1: ePWM2 (GPIO2 and GPIO3), up-down, 5KHz, and m=-0.3 +- CPU2: ePWM4 (GPIO6 and GPIO7), up-count, 15KHz, and D=0.6 +- CPU2: ePWM5 (GPIO8 and GPIO8), up-down, 4KHz, and m=+0.7 +*/ + + +#include "driverlib.h" +#include "device.h" + +void main(void) +{ + +} \ No newline at end of file