/* Gerardo Marx
21/Oct/2026
Objective:
- ePWM1 (ePWM1A and ePWM1A) and ePWM2 will be controlled CPU1
- ePWM4 and ePWM5 will be controlled CPU2
- CPU1: ePWM1 (GPIO0 and GPIO1 outputs), up-count, 10KHz, and D=0.4
- CPU1: ePWM2 (GPIO2 and GPIO3), up-down, 5KHz, and m=-0.3
- CPU2: ePWM4 (GPIO6 and GPIO7), up-count, 15KHz, and D=0.6
- CPU2: ePWM5 (GPIO8 and GPIO8), up-down, 4KHz, and m=+0.7
*/

// libreries
#include "F28x_Project.h"
#include "driverlib.h"
#include "device.h"

// interrupts


//main
void main(void)
{
    // 1. Initialize the system and interrupts
    InitSysCtrl(); 
    EALLOW;
    ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV = 1; // 50MHz
    EDIS;

    // 2. Select the ePWM clocks and assign CPU ownership
    EALLOW;
    DevCfgRegs.CPUSEL0.bit.EPWM1 = 0; //cpu1
    DevCfgRegs.CPUSEL0.bit.EPWM2 = 0; //cpu1

    DevCfgRegs.CPUSEL0.bit.EPWM4 = 1; //cpu2
    DevCfgRegs.CPUSEL0.bit.EPWM5 = 1; //cpu2
    EDIS;

    // 3. Enable ePWM1 and ePWM2 clocks
    EALLOW;
    CpuSysRegs.PCLKCR2.bit.EPWM1 = 1; //Module clock on
    CpuSysRegs.PCLKCR2.bit.EPWM2 = 1; //Module clock on
    EDIS;

    // 4. Stop time-base synchronization
    EALLOW;
    CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0; // stop time base counter
    EDIS;

    // 5. Configure TB and CC.
    
    // Configure epwm 1 and 2
    
    //Time base sub-module ePWM1
    // 100MHz -> TBCLK = 100MHz/(HSPCLKDIV*CLKDIV) -> 50MHz
    //                              2     * 1
    EPwm1Regs.TBCTL.bit.FREE_SOFT = 2; // free run
    EPwm1Regs.TBCTL.bit.CLKDIV = 0; // 1
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = 1; // 2
    EPwm1Regs.TBCTL.bit.PRDLD = 0; //shadow mode
    EPwm1Regs.TBCTL.bit.CTRMODE = 0; //up-count mode

    //Time base sub-module ePWM2
    // 100MHz -> TBCLK = 100MHz/(HSPCLKDIV*CLKDIV) -> 50MHz
    //                              2     * 1
    EPwm2Regs.TBCTL.bit.FREE_SOFT = 2; // free run
    EPwm2Regs.TBCTL.bit.CLKDIV = 0; // 1
    EPwm2Regs.TBCTL.bit.HSPCLKDIV = 1; // 2
    EPwm2Regs.TBCTL.bit.PRDLD = 0; //shadow mode
    EPwm2Regs.TBCTL.bit.CTRMODE = 2; //up-down count mode

    // Period registers:
    EPwm1Regs.TBPRD = 5000-1; // 10KHz sawtooth
    EPwm2Regs.TBPRD = 5000; // 5KHz triangular

    














    // 6. Configure AQ and dead band.
    // 7. Configure event trigger and trip-zones.
    // 8. Register and enable interrupts.
    // 9. Configure PWM GPIOs, diagnostic pin, and X-BAR
    // 10. Confirm fault condition and syncronize startup.

    for(;;) { } 

}