commit 9c90c7405a1e6f5a1dc12f7589d11dd82cbea3d0
Author: Gerardo Marx <gmarx_cc@itmorelia.edu.mx>
Date:   Wed Sep 24 00:18:12 2025 -0600

    simulation

diff --git a/Readme.md b/Readme.md
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+# Introduction 
+
+One of the most important stages during circuit design is simulation. Several circuit simulators are available to carry out the task, but SPICE-based simulators are the most versatile and powerful.
+
+SPICE stands for Simulation Program with Integrated Circuit Emphasis. It is a general-purpose, open-source analog electronic circuit simulator originally developed at the University of California, Berkeley, in the 1970s. SPICE is now the foundation for almost all modern circuit simulators (like LTspice, PSpice, HSPICE, Ngspice, etc.).
+
+# The basic PCG Scheme
+
+![The PCG general scheme](./block-scheme.jpg)
+
+
+# Non-inverting amplifier
+## Design equations
+The Operational amplifier design is based on:
+- No feedback
+
+
+## Simulation with UI
+
+![The PCG general scheme](./non-inverter.jpg)
+
+## Simulation with code
+```
+* Non-inverting amplifier with UniversalOpamp2
+Vin in 0 SINE(0 1 1k)
+R3  in vp 100k
+R1  vn out 470k
+R2  vn 0  1k
+R4  out 0 100k
+
+* Library (comes with LTspice) and instance
+.include opamp.sub
+XU1 vp vn out opamp Aol=100k GBW=10Meg
+
+.tran 0 1m 0 0.1u
+.end
+```
+
+
+
+
+
+```spice
+Version 4
+SymbolType CELL
+LINE Normal -32 32 32 64
+LINE Normal -32 96 32 64
+LINE Normal -32 32 -32 96
+LINE Normal -28 48 -20 48
+LINE Normal -28 80 -20 80
+LINE Normal -24 84 -24 76
+WINDOW 0 0 32 Left 2
+SYMATTR Prefix X
+SYMATTR Description Ideal single-pole operational amplifier. You must .lib opamp.sub
+SYMATTR Value opamp
+SYMATTR SpiceLine Aol=100K
+SYMATTR SpiceLine2 GBW=10Meg
+PIN -32 48 NONE 0
+PINATTR PinName invin
+PINATTR SpiceOrder 1
+PIN -32 80 NONE 0
+PINATTR PinName noninvin
+PINATTR SpiceOrder 2
+PIN 32 64 NONE 0
+PINATTR PinName out
+PINATTR SpiceOrder 3
+```
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diff --git a/non-inverting.cir b/non-inverting.cir
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+* Non-inverting amplifier with UniversalOpamp2
+Vin in 0 SINE(0 1 1k)
+R3  in vp 100k
+R1  vn out 470k
+R2  vn 0  1k
+R4  out 0 100k
+
+* Power rails for the op-amp
+VCC V+ 0  +15
+VEE V- 0  -15
+
+* Library (comes with LTspice) and instance
+.include opamp.sub
+XU1 vp vn out opamp Aol=100k GBW=10Meg
+
+* model and plots
+.tran 0 1m 0 0.1u
+.end
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