Code working with ti functions
commit
32fd4a9ca5
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# Creating a dual CPU project
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- Open a new folder; not workspace
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- Import project from `C2000Ware_26_01_00_00`: `driverlib/f2837xd/examples/dual/empty_projects/css`
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- Change project names
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- `gpio_bitfield_cpu1`
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- `gpio_driverlib_cpu2`
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- Change the `.c` files also
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- Driverlib project does not require changes for compiling
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- Bitfield project needs some additional compilation variables
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- Path type var named `C2000_Common` point to `/Users/gmarx/ti/C2000Ware_26_01_00_00/device_support/f2837xd/common/include`
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- Path type var named `C2000_Headers` pointing to `/Users/gmarx/ti/C2000Ware_26_01_00_00/device_support/f2837xd/headers/include`
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- Also at `C2000 Compiler` and `Include Options` we should add the previous created vars as:
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- `${C2000_Common}`
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- `${C2000_HEaders}`
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- Additionally at `C2000 Compiler` and `Predefined Symbols` add the entry:
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- `_DUAL_HEADERS`
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- Additional source files must be added from `/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/source`:
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- `F2837xD_SysCtrl.c`
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- `F2837xD_usDelay.asm`
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- Adding the file `F2837xD_GlobalVariableDefs.c`-data structure to map all peripherals- that is at `/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/source/F2837xD_GlobalVariableDefs.c`
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- Adding the GPIO file ...
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- One last file must be included the `F2837xD_Headers_nonBIOS_cpu1.cmd` from the path `/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/cmd/F2837xD_Headers_nonBIOS_cpu1.cmd` **we are using the nonBIOS option because the code will run in debug mode**
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- However, the CPU2 has an issue at the `Predefined symbols`, we must change the name `CPU1` to `CPU2`
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# GPIOs example
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## CPU1 - Bitfield
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```c
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/*
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Example project to handle GPIOs from both CPUs using
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bitfield and driverlib approaches, respectively on each CPU.
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-------------
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CPU1: GPIO22 and GPIO97 using bitfield
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CPU2: GPIO52 using driverlib
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*/
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// Included Files
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#include "driverlib.h"
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#include "device.h"
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#include "F28x_Project.h"
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// Main
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void main(void)
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{
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// 1: init system
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InitSysCtrl();
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// 2: configure gpios
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EALLOW;
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//2.1: GPIO22:
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GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 0; // pin as gpio
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GpioCtrlRegs.GPADIR.bit.GPIO22 = 1; // configured as output
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GpioCtrlRegs.GPACSEL3.bit.GPIO22 = 0; // cpu1 by default
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//2.2: GPIO52:
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GpioCtrlRegs.GPBMUX2.bit.GPIO52 = 0; // pin as gpio
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GpioCtrlRegs.GPBDIR.bit.GPIO52 = 1; // as output
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GpioCtrlRegs.GPBCSEL3.bit.GPIO52 = 2; //cpu2
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//2.3 GPIO 97:
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GpioCtrlRegs.GPDGMUX1.bit.GPIO97 = 0; // pin as gpio
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GpioCtrlRegs.GPDDIR.bit.GPIO97 = 1; // output
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EDIS;
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// 3: Change the gpios state
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// 3.1: gpioo22:
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GpioDataRegs.GPASET.bit.GPIO22 = 1; // set a logic 1 in the output
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// 3.2: gpio97:
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GpioDataRegs.GPDSET.bit.GPIO97 = 1; // set a logic 1 in the output
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// 4: Infinite loop
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}
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// End of file
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```
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## CPU2 - driverlib
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The main code is:
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```c
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/*Gerardo Marx
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16th July 2026
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GPIOs management with dual CPUs
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----------------
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CPU1: GPIO22 and GPIO97 using bitfield approach
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CPU2: GPIO52 using driverlib approach
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|-----------|
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|GPIO22 |
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| ---- |
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|GPIO97 |
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|GPIO52 |
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|-----------|
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*/
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// Libraries and includes
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#include "driverlib.h"
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#include "device.h"
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void main(void){
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// 1: init uc does not required for CPU2
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// 2: config gpios
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//GPIO_setPadConfig(52, GPIO_PIN_TYPE_STD);
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//GPIO_setDirectionMode(52, GPIO_DIR_MODE_OUT);
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//GPIO_setControllerCore()
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// 3: change state
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GPIO_writePin(52, 1);
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// 4: finite loop
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for(;;)
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{
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// control task
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}
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}
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```
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Pin type at `gpio.h` file
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```c
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//*****************************************************************************
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//
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// Values that can be passed to GPIO_setPadConfig() as the pinType parameter
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// and returned by GPIO_getPadConfig().
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//
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//*****************************************************************************
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#define GPIO_PIN_TYPE_STD 0x0000U //!< Push-pull output or floating input
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#define GPIO_PIN_TYPE_PULLUP 0x0001U //!< Pull-up enable for input
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#define GPIO_PIN_TYPE_INVERT 0x0002U //!< Invert polarity on input
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#define GPIO_PIN_TYPE_OD 0x0004U //!< Open-drain on output
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#endif
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```
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Files to explore and use with a second approach instead of `GPIO_writePin` you can use`HWREG` function:
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- `hw_memmap.h`
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- `hw_gpio.h`
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Compilation error `GPIO_EnableUnbondedIOPullups`
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- /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_GlobalPrototypes.h
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- `F2837xD_Gpio.c`
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@ -0,0 +1,12 @@
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<?xml version="1.0" encoding="UTF-8" ?>
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<?ccsproject version="1.0"?>
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<projectOptions>
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<ccsVariant value="50:Theia-based"/>
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<ccsVersion value="70.5.0"/>
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<deviceFamily value="C2000"/>
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<executableActions value=""/>
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<createSlaveProjects value=""/>
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<templateProperties value="id=empty_driverlib_project.projectspec.empty_driverlib_project_cpu1"/>
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<origin value="/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/examples/dual/empty_projects/CCS/empty_driverlib_project.projectspec"/>
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<filesToOpen value=""/>
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</projectOptions>
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# This is an auto-generated file - do not add it to source-control
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CompileFlags:
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CompilationDatabase: CPU1_RAM/.clangd
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Diagnostics:
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Suppress: '*'
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
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<storageModule moduleId="org.eclipse.cdt.core.settings">
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<cconfiguration id="com.ti.ccstudio.buildDefinitions.C2000.Default.1147767198">
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<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.ti.ccstudio.buildDefinitions.C2000.Default.1147767198" moduleId="org.eclipse.cdt.core.settings" name="CPU1_RAM">
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<macros>
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<stringMacro name="C2000WARE_DLIB_ROOT" type="VALUE_PATH_ANY" value="${COM_TI_C2000WARE_INSTALL_DIR}/driverlib/f2837xd/driverlib/"/>
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<stringMacro name="C2000_Headers" type="VALUE_PATH_ANY" value="/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include"/>
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<stringMacro name="C2000_Common" type="VALUE_PATH_ANY" value="/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include"/>
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</macros>
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<externalSettings/>
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<extensions>
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<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="com.ti.ccs.project.ErrorParser"/>
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<extension id="com.ti.ccs.errorparser.CompilerErrorParser_TI" point="com.ti.ccs.project.ErrorParser"/>
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</extensions>
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</storageModule>
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<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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<configuration artifactExtension="out" artifactName="${ProjName}" buildProperties="" cleanCommand="${CG_CLEAN_CMD}" description="" id="com.ti.ccstudio.buildDefinitions.C2000.Default.1147767198" name="CPU1_RAM" parent="com.ti.ccstudio.buildDefinitions.C2000.Default">
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<folderInfo id="com.ti.ccstudio.buildDefinitions.C2000.Default.1147767198." name="/" resourcePath="">
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<toolChain id="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.DebugToolchain.1386864708" name="TI Build Tools" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.DebugToolchain" targetTool="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.linkerDebug.166202317">
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<option id="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS.1171818019" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS" valueType="stringList">
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<listOptionValue value="DEVICE_CONFIGURATION_ID=TMS320C28XX.TMS320F28377D"/>
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<listOptionValue value="DEVICE_CORE_ID="/>
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<listOptionValue value="DEVICE_ENDIANNESS=little"/>
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<listOptionValue value="OUTPUT_FORMAT=ELF"/>
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<listOptionValue value="CCS_MBS_VERSION=70.0.0"/>
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<listOptionValue value="RUNTIME_SUPPORT_LIBRARY=libc.a"/>
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<listOptionValue value="OUTPUT_TYPE=executable"/>
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<listOptionValue value="PRODUCTS=C2000WARE:26.0.0.00;"/>
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<listOptionValue value="PRODUCT_MACRO_IMPORTS={"C2000WARE":["${COM_TI_C2000WARE_INCLUDE_PATH}","${COM_TI_C2000WARE_LIBRARY_PATH}","${COM_TI_C2000WARE_LIBRARIES}","${COM_TI_C2000WARE_SYMBOLS}","${COM_TI_C2000WARE_SYSCONFIG_MANIFEST}"]}"/>
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</option>
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<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.442362085" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="25.11.0.LTS" valueType="string"/>
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<targetPlatform id="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.targetPlatformDebug.2139062882" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.targetPlatformDebug"/>
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<builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.builderDebug.1526884861" keepEnvironmentInBuildfile="false" name="GNU Make" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.builderDebug"/>
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<tool id="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.compilerDebug.919756198" name="C2000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.compilerDebug">
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.LARGE_MEMORY_MODEL.1278521011" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.LARGE_MEMORY_MODEL" value="true" valueType="boolean"/>
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.UNIFIED_MEMORY.365518420" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.UNIFIED_MEMORY" value="true" valueType="boolean"/>
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.SILICON_VERSION.636784053" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.SILICON_VERSION" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.SILICON_VERSION.28" valueType="enumerated"/>
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.FLOAT_SUPPORT.67105016" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.FLOAT_SUPPORT" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.FLOAT_SUPPORT.fpu32" valueType="enumerated"/>
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.CLA_SUPPORT.1930558540" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.CLA_SUPPORT" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.CLA_SUPPORT.cla1" valueType="enumerated"/>
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.VCU_SUPPORT.1264239609" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.VCU_SUPPORT" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.VCU_SUPPORT.vcu2" valueType="enumerated"/>
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.TMU_SUPPORT.585926135" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.TMU_SUPPORT" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.TMU_SUPPORT.tmu0" valueType="enumerated"/>
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DISPLAY_ERROR_NUMBER.804311425" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DISPLAY_ERROR_NUMBER" value="true" valueType="boolean"/>
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_WARNING.1376824102" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_WARNING" valueType="stringList">
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<listOptionValue value="225"/>
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</option>
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_WRAP.546227147" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_WRAP" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_WRAP.off" valueType="enumerated"/>
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.INCLUDE_PATH.534631675" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.INCLUDE_PATH" valueType="includePath">
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||||||
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<listOptionValue value="${COM_TI_C2000WARE_INCLUDE_PATH}"/>
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||||||
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<listOptionValue value="${PROJECT_ROOT}"/>
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||||||
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<listOptionValue value="${PROJECT_ROOT}/device"/>
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<listOptionValue value="${C2000WARE_DLIB_ROOT}"/>
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<listOptionValue value="${CG_TOOL_ROOT}/include"/>
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<listOptionValue value="${C2000_Headers}"/>
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||||||
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<listOptionValue value="${C2000_Common}"/>
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||||||
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</option>
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||||||
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.ABI.1644558797" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.ABI" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.ABI.eabi" valueType="enumerated"/>
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DEFINE.2122134346" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DEFINE" valueType="definedSymbols">
|
||||||
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<listOptionValue value="${COM_TI_C2000WARE_SYMBOLS}"/>
|
||||||
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<listOptionValue value="DEBUG"/>
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||||||
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<listOptionValue value="CPU1"/>
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||||||
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<listOptionValue value="_DUAL_HEADERS"/>
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||||||
|
</option>
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||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.OPT_LEVEL.1443581423" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.OPT_LEVEL" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.OPT_LEVEL.off" valueType="enumerated"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_SUPPRESS.1664245501" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_SUPPRESS" valueType="stringList">
|
||||||
|
<listOptionValue value="10063"/>
|
||||||
|
</option>
|
||||||
|
</tool>
|
||||||
|
<tool id="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.linkerDebug.166202317" name="C2000 Linker" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.linkerDebug">
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||||||
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.STACK_SIZE.1522067021" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.STACK_SIZE" value="0x100" valueType="string"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.OUTPUT_FILE.1920682247" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.OUTPUT_FILE" value="${ProjName}.out" valueType="string"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.MAP_FILE.1103361900" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.MAP_FILE" value="${ProjName}.map" valueType="string"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.XML_LINK_INFO.1615117904" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.XML_LINK_INFO" value="${ProjName}_linkInfo.xml" valueType="string"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DISPLAY_ERROR_NUMBER.954279278" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DISPLAY_ERROR_NUMBER" value="true" valueType="boolean"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DIAG_WRAP.1111377917" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DIAG_WRAP" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DIAG_WRAP.off" valueType="enumerated"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.SEARCH_PATH.1687330592" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.SEARCH_PATH" valueType="libPaths">
|
||||||
|
<listOptionValue value="${COM_TI_C2000WARE_LIBRARY_PATH}"/>
|
||||||
|
<listOptionValue value="${CG_TOOL_ROOT}/lib"/>
|
||||||
|
<listOptionValue value="${CG_TOOL_ROOT}/include"/>
|
||||||
|
</option>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.LIBRARY.1427362131" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.LIBRARY" valueType="libs">
|
||||||
|
<listOptionValue value="${COM_TI_C2000WARE_LIBRARIES}"/>
|
||||||
|
<listOptionValue value="libc.a"/>
|
||||||
|
</option>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.ENTRY_POINT.35520800" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.ENTRY_POINT" value="code_start" valueType="string"/>
|
||||||
|
</tool>
|
||||||
|
<tool id="com.ti.ccstudio.buildDefinitions.C2000_25.11.hex.1485007242" name="C2000 Hex Utility" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.hex"/>
|
||||||
|
</toolChain>
|
||||||
|
</folderInfo>
|
||||||
|
<sourceEntries>
|
||||||
|
<entry excluding="device/driverlib|2837xD_FLASH_lnk_cpu1.cmd" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
|
||||||
|
</sourceEntries>
|
||||||
|
</configuration>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||||
|
</cconfiguration>
|
||||||
|
<cconfiguration id="com.ti.ccstudio.buildDefinitions.C2000.Default.1770990684">
|
||||||
|
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.ti.ccstudio.buildDefinitions.C2000.Default.1770990684" moduleId="org.eclipse.cdt.core.settings" name="CPU1_FLASH">
|
||||||
|
<macros>
|
||||||
|
<stringMacro name="C2000WARE_DLIB_ROOT" type="VALUE_PATH_ANY" value="${COM_TI_C2000WARE_INSTALL_DIR}/driverlib/f2837xd/driverlib/"/>
|
||||||
|
</macros>
|
||||||
|
<externalSettings/>
|
||||||
|
<extensions>
|
||||||
|
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="com.ti.ccs.project.ErrorParser"/>
|
||||||
|
<extension id="com.ti.ccs.errorparser.CompilerErrorParser_TI" point="com.ti.ccs.project.ErrorParser"/>
|
||||||
|
</extensions>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||||
|
<configuration artifactExtension="out" artifactName="${ProjName}" buildProperties="" cleanCommand="${CG_CLEAN_CMD}" description="" id="com.ti.ccstudio.buildDefinitions.C2000.Default.1770990684" name="CPU1_FLASH" parent="com.ti.ccstudio.buildDefinitions.C2000.Default">
|
||||||
|
<folderInfo id="com.ti.ccstudio.buildDefinitions.C2000.Default.1770990684." name="/" resourcePath="">
|
||||||
|
<toolChain id="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.DebugToolchain.1381510634" name="TI Build Tools" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.DebugToolchain" targetTool="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.linkerDebug.1969186158">
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS.1000531136" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS" valueType="stringList">
|
||||||
|
<listOptionValue value="DEVICE_CONFIGURATION_ID=TMS320C28XX.TMS320F28377D"/>
|
||||||
|
<listOptionValue value="DEVICE_CORE_ID="/>
|
||||||
|
<listOptionValue value="DEVICE_ENDIANNESS=little"/>
|
||||||
|
<listOptionValue value="OUTPUT_FORMAT=ELF"/>
|
||||||
|
<listOptionValue value="CCS_MBS_VERSION=70.0.0"/>
|
||||||
|
<listOptionValue value="RUNTIME_SUPPORT_LIBRARY=libc.a"/>
|
||||||
|
<listOptionValue value="OUTPUT_TYPE=executable"/>
|
||||||
|
<listOptionValue value="PRODUCTS=C2000WARE:26.0.0.00;"/>
|
||||||
|
<listOptionValue value="PRODUCT_MACRO_IMPORTS={"C2000WARE":["${COM_TI_C2000WARE_INCLUDE_PATH}","${COM_TI_C2000WARE_LIBRARY_PATH}","${COM_TI_C2000WARE_LIBRARIES}","${COM_TI_C2000WARE_SYMBOLS}","${COM_TI_C2000WARE_SYSCONFIG_MANIFEST}"]}"/>
|
||||||
|
</option>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.593431257" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="25.11.0.LTS" valueType="string"/>
|
||||||
|
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.targetPlatformDebug.1118332218" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.targetPlatformDebug"/>
|
||||||
|
<builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.builderDebug.798795640" keepEnvironmentInBuildfile="false" name="GNU Make" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.builderDebug"/>
|
||||||
|
<tool id="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.compilerDebug.1230383183" name="C2000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.compilerDebug">
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.LARGE_MEMORY_MODEL.828203336" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.LARGE_MEMORY_MODEL" value="true" valueType="boolean"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.UNIFIED_MEMORY.1100935198" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.UNIFIED_MEMORY" value="true" valueType="boolean"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.SILICON_VERSION.1640313668" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.SILICON_VERSION" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.SILICON_VERSION.28" valueType="enumerated"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.FLOAT_SUPPORT.256570864" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.FLOAT_SUPPORT" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.FLOAT_SUPPORT.fpu32" valueType="enumerated"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.CLA_SUPPORT.1152597652" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.CLA_SUPPORT" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.CLA_SUPPORT.cla1" valueType="enumerated"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.VCU_SUPPORT.688358224" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.VCU_SUPPORT" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.VCU_SUPPORT.vcu2" valueType="enumerated"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.TMU_SUPPORT.2019138533" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.TMU_SUPPORT" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.TMU_SUPPORT.tmu0" valueType="enumerated"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DISPLAY_ERROR_NUMBER.1275051670" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DISPLAY_ERROR_NUMBER" value="true" valueType="boolean"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_WARNING.1785384608" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_WARNING" valueType="stringList">
|
||||||
|
<listOptionValue value="225"/>
|
||||||
|
</option>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_WRAP.514911996" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_WRAP" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_WRAP.off" valueType="enumerated"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.INCLUDE_PATH.684960172" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.INCLUDE_PATH" valueType="includePath">
|
||||||
|
<listOptionValue value="${COM_TI_C2000WARE_INCLUDE_PATH}"/>
|
||||||
|
<listOptionValue value="${PROJECT_ROOT}"/>
|
||||||
|
<listOptionValue value="${PROJECT_ROOT}/device"/>
|
||||||
|
<listOptionValue value="${C2000WARE_DLIB_ROOT}"/>
|
||||||
|
<listOptionValue value="${CG_TOOL_ROOT}/include"/>
|
||||||
|
</option>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.ABI.1384365309" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.ABI" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.ABI.eabi" valueType="enumerated"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DEFINE.867143798" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DEFINE" valueType="definedSymbols">
|
||||||
|
<listOptionValue value="${COM_TI_C2000WARE_SYMBOLS}"/>
|
||||||
|
<listOptionValue value="_FLASH"/>
|
||||||
|
<listOptionValue value="DEBUG"/>
|
||||||
|
<listOptionValue value="CPU1"/>
|
||||||
|
</option>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.OPT_LEVEL.164072809" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.OPT_LEVEL" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.OPT_LEVEL.off" valueType="enumerated"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_SUPPRESS.2041968153" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.compilerID.DIAG_SUPPRESS" valueType="stringList">
|
||||||
|
<listOptionValue value="10063"/>
|
||||||
|
</option>
|
||||||
|
</tool>
|
||||||
|
<tool id="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.linkerDebug.1969186158" name="C2000 Linker" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.exe.linkerDebug">
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.STACK_SIZE.382082977" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.STACK_SIZE" value="0x100" valueType="string"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.OUTPUT_FILE.176928016" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.OUTPUT_FILE" value="${ProjName}.out" valueType="string"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.MAP_FILE.875232757" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.MAP_FILE" value="${ProjName}.map" valueType="string"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.XML_LINK_INFO.51674635" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.XML_LINK_INFO" value="${ProjName}_linkInfo.xml" valueType="string"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DISPLAY_ERROR_NUMBER.2061349353" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DISPLAY_ERROR_NUMBER" value="true" valueType="boolean"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DIAG_WRAP.795252357" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DIAG_WRAP" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DIAG_WRAP.off" valueType="enumerated"/>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.SEARCH_PATH.234021702" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.SEARCH_PATH" valueType="libPaths">
|
||||||
|
<listOptionValue value="${COM_TI_C2000WARE_LIBRARY_PATH}"/>
|
||||||
|
<listOptionValue value="${CG_TOOL_ROOT}/lib"/>
|
||||||
|
<listOptionValue value="${CG_TOOL_ROOT}/include"/>
|
||||||
|
</option>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.LIBRARY.1434653506" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.LIBRARY" valueType="libs">
|
||||||
|
<listOptionValue value="${COM_TI_C2000WARE_LIBRARIES}"/>
|
||||||
|
<listOptionValue value="libc.a"/>
|
||||||
|
</option>
|
||||||
|
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.ENTRY_POINT.1722305670" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.ENTRY_POINT" value="code_start" valueType="string"/>
|
||||||
|
</tool>
|
||||||
|
<tool id="com.ti.ccstudio.buildDefinitions.C2000_25.11.hex.93848394" name="C2000 Hex Utility" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.hex"/>
|
||||||
|
</toolChain>
|
||||||
|
</folderInfo>
|
||||||
|
<sourceEntries>
|
||||||
|
<entry excluding="device/driverlib|2837xD_RAM_lnk_cpu1.cmd" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
|
||||||
|
</sourceEntries>
|
||||||
|
</configuration>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||||
|
</cconfiguration>
|
||||||
|
</storageModule>
|
||||||
|
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||||
|
<project id="empty_driverlib_project_cpu1.com.ti.ccstudio.buildDefinitions.C2000.ProjectType.1327004450" name="C2000" projectType="com.ti.ccstudio.buildDefinitions.C2000.ProjectType"/>
|
||||||
|
</storageModule>
|
||||||
|
</cproject>
|
||||||
@ -0,0 +1,41 @@
|
|||||||
|
<?xml version="1.0" encoding="UTF-8"?>
|
||||||
|
<projectDescription>
|
||||||
|
<name>gpio_bitfield_cpu1</name>
|
||||||
|
<comment></comment>
|
||||||
|
<projects>
|
||||||
|
</projects>
|
||||||
|
<buildSpec>
|
||||||
|
<buildCommand>
|
||||||
|
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||||
|
<arguments>
|
||||||
|
</arguments>
|
||||||
|
</buildCommand>
|
||||||
|
</buildSpec>
|
||||||
|
<natures>
|
||||||
|
<nature>com.ti.ccstudio.core.ccsNature</nature>
|
||||||
|
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||||
|
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||||
|
<nature>org.eclipse.cdt.core.ccnature</nature>
|
||||||
|
</natures>
|
||||||
|
<linkedResources>
|
||||||
|
<link>
|
||||||
|
<name>driverlib.lib</name>
|
||||||
|
<type>1</type>
|
||||||
|
<locationURI>COM_TI_C2000WARE_INSTALL_DIR/driverlib/f2837xd/driverlib/ccs/Debug/driverlib.lib</locationURI>
|
||||||
|
</link>
|
||||||
|
</linkedResources>
|
||||||
|
<variableList>
|
||||||
|
<variable>
|
||||||
|
<name>C2000WARE_DLIB_ROOT</name>
|
||||||
|
<value>$%7BCOM_TI_C2000WARE_INSTALL_DIR%7D/driverlib/f2837xd/driverlib</value>
|
||||||
|
</variable>
|
||||||
|
<variable>
|
||||||
|
<name>C2000_Common</name>
|
||||||
|
<value>file:/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include</value>
|
||||||
|
</variable>
|
||||||
|
<variable>
|
||||||
|
<name>C2000_Headers</name>
|
||||||
|
<value>file:/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include</value>
|
||||||
|
</variable>
|
||||||
|
</variableList>
|
||||||
|
</projectDescription>
|
||||||
@ -0,0 +1,3 @@
|
|||||||
|
eclipse.preferences.version=1
|
||||||
|
inEditor=false
|
||||||
|
onBuild=false
|
||||||
@ -0,0 +1,9 @@
|
|||||||
|
eclipse.preferences.version=1
|
||||||
|
encoding//CPU1_RAM/device/subdir_rules.mk=UTF-8
|
||||||
|
encoding//CPU1_RAM/device/subdir_vars.mk=UTF-8
|
||||||
|
encoding//CPU1_RAM/makefile=UTF-8
|
||||||
|
encoding//CPU1_RAM/objects.mk=UTF-8
|
||||||
|
encoding//CPU1_RAM/sources.mk=UTF-8
|
||||||
|
encoding//CPU1_RAM/subdir_rules.mk=UTF-8
|
||||||
|
encoding//CPU1_RAM/subdir_vars.mk=UTF-8
|
||||||
|
encoding/<project>=UTF-8
|
||||||
@ -0,0 +1,176 @@
|
|||||||
|
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
PAGE 0 : /* Program Memory */
|
||||||
|
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
|
||||||
|
/* BEGIN is used for the "boot to Flash" bootloader mode */
|
||||||
|
|
||||||
|
BEGIN : origin = 0x080000, length = 0x000002
|
||||||
|
RAMM0 : origin = 0x000123, length = 0x0002DD
|
||||||
|
RAMD0 : origin = 0x00B000, length = 0x000800
|
||||||
|
RAMLS0 : origin = 0x008000, length = 0x000800
|
||||||
|
RAMLS1 : origin = 0x008800, length = 0x000800
|
||||||
|
RAMLS2 : origin = 0x009000, length = 0x000800
|
||||||
|
RAMLS3 : origin = 0x009800, length = 0x000800
|
||||||
|
RAMLS4 : origin = 0x00A000, length = 0x000800
|
||||||
|
RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
|
||||||
|
RAMGS15 : origin = 0x01B000, length = 0x000FF8 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
|
||||||
|
|
||||||
|
// RAMGS15_RSVD : origin = 0x01BFF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
|
||||||
|
|
||||||
|
RESET : origin = 0x3FFFC0, length = 0x000002
|
||||||
|
|
||||||
|
/* Flash sectors */
|
||||||
|
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
|
||||||
|
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
|
||||||
|
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
|
||||||
|
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
|
||||||
|
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
|
||||||
|
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
|
||||||
|
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
|
||||||
|
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
|
||||||
|
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
|
||||||
|
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
|
||||||
|
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
|
||||||
|
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
|
||||||
|
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
|
||||||
|
FLASHN : origin = 0x0BE000, length = 0x001FF0 /* on-chip Flash */
|
||||||
|
|
||||||
|
// FLASHN_RSVD : origin = 0x0BFFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
|
||||||
|
|
||||||
|
PAGE 1 : /* Data Memory */
|
||||||
|
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */
|
||||||
|
|
||||||
|
BOOT_RSVD : origin = 0x000002, length = 0x000121 /* Part of M0, BOOT rom will use this for stack */
|
||||||
|
RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
|
||||||
|
// RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
|
||||||
|
RAMD1 : origin = 0x00B800, length = 0x000800
|
||||||
|
|
||||||
|
RAMLS5 : origin = 0x00A800, length = 0x000800
|
||||||
|
|
||||||
|
RAMGS0 : origin = 0x00C000, length = 0x001000
|
||||||
|
RAMGS1 : origin = 0x00D000, length = 0x001000
|
||||||
|
RAMGS2 : origin = 0x00E000, length = 0x001000
|
||||||
|
RAMGS3 : origin = 0x00F000, length = 0x001000
|
||||||
|
RAMGS4 : origin = 0x010000, length = 0x001000
|
||||||
|
RAMGS5 : origin = 0x011000, length = 0x001000
|
||||||
|
RAMGS6 : origin = 0x012000, length = 0x001000
|
||||||
|
RAMGS7 : origin = 0x013000, length = 0x001000
|
||||||
|
RAMGS8 : origin = 0x014000, length = 0x001000
|
||||||
|
RAMGS9 : origin = 0x015000, length = 0x001000
|
||||||
|
RAMGS10 : origin = 0x016000, length = 0x001000
|
||||||
|
|
||||||
|
// RAMGS11 : origin = 0x017000, length = 0x000FF8 /* Uncomment for F28374D, F28376D devices */
|
||||||
|
|
||||||
|
// RAMGS11_RSVD : origin = 0x017FF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
|
||||||
|
|
||||||
|
RAMGS11 : origin = 0x017000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
|
||||||
|
RAMGS12 : origin = 0x018000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
|
||||||
|
RAMGS13 : origin = 0x019000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
|
||||||
|
|
||||||
|
CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
|
||||||
|
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
|
||||||
|
}
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
/* Allocate program areas: */
|
||||||
|
.cinit : > FLASHB PAGE = 0, ALIGN(8)
|
||||||
|
.text : >> FLASHB | FLASHC | FLASHD | FLASHE PAGE = 0, ALIGN(8)
|
||||||
|
codestart : > BEGIN PAGE = 0, ALIGN(8)
|
||||||
|
/* Allocate uninitalized data sections: */
|
||||||
|
.stack : > RAMM1 PAGE = 1
|
||||||
|
.switch : > FLASHB PAGE = 0, ALIGN(8)
|
||||||
|
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
|
||||||
|
|
||||||
|
#if defined(__TI_EABI__)
|
||||||
|
.init_array : > FLASHB, PAGE = 0, ALIGN(8)
|
||||||
|
.bss : > RAMLS5, PAGE = 1
|
||||||
|
.bss:output : > RAMLS3, PAGE = 0
|
||||||
|
.bss:cio : > RAMLS5, PAGE = 1
|
||||||
|
.data : > RAMLS5, PAGE = 1
|
||||||
|
.sysmem : > RAMLS5, PAGE = 1
|
||||||
|
/* Initalized sections go in Flash */
|
||||||
|
.const : > FLASHF, PAGE = 0, ALIGN(8)
|
||||||
|
#else
|
||||||
|
.pinit : > FLASHB, PAGE = 0, ALIGN(8)
|
||||||
|
.ebss : >> RAMLS5 | RAMGS0 | RAMGS1, PAGE = 1
|
||||||
|
.esysmem : > RAMLS5, PAGE = 1
|
||||||
|
.cio : > RAMLS5, PAGE = 1
|
||||||
|
/* Initalized sections go in Flash */
|
||||||
|
.econst : >> FLASHF PAGE = 0, ALIGN(8)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
Filter_RegsFile : > RAMGS0, PAGE = 1
|
||||||
|
|
||||||
|
SHARERAMGS0 : > RAMGS0, PAGE = 1
|
||||||
|
SHARERAMGS1 : > RAMGS1, PAGE = 1
|
||||||
|
SHARERAMGS2 : > RAMGS2, PAGE = 1
|
||||||
|
ramgs0 : > RAMGS0, PAGE = 1
|
||||||
|
ramgs1 : > RAMGS1, PAGE = 1
|
||||||
|
|
||||||
|
#ifdef __TI_COMPILER_VERSION__
|
||||||
|
#if __TI_COMPILER_VERSION__ >= 15009000
|
||||||
|
#if defined(__TI_EABI__)
|
||||||
|
.TI.ramfunc : {} LOAD = FLASHD,
|
||||||
|
RUN = RAMLS0,
|
||||||
|
LOAD_START(RamfuncsLoadStart),
|
||||||
|
LOAD_SIZE(RamfuncsLoadSize),
|
||||||
|
LOAD_END(RamfuncsLoadEnd),
|
||||||
|
RUN_START(RamfuncsRunStart),
|
||||||
|
RUN_SIZE(RamfuncsRunSize),
|
||||||
|
RUN_END(RamfuncsRunEnd),
|
||||||
|
PAGE = 0, ALIGN(8)
|
||||||
|
#else
|
||||||
|
.TI.ramfunc : {} LOAD = FLASHD,
|
||||||
|
RUN = RAMLS0,
|
||||||
|
LOAD_START(_RamfuncsLoadStart),
|
||||||
|
LOAD_SIZE(_RamfuncsLoadSize),
|
||||||
|
LOAD_END(_RamfuncsLoadEnd),
|
||||||
|
RUN_START(_RamfuncsRunStart),
|
||||||
|
RUN_SIZE(_RamfuncsRunSize),
|
||||||
|
RUN_END(_RamfuncsRunEnd),
|
||||||
|
PAGE = 0, ALIGN(8)
|
||||||
|
#endif
|
||||||
|
#else
|
||||||
|
ramfuncs : LOAD = FLASHD,
|
||||||
|
RUN = RAMLS0,
|
||||||
|
LOAD_START(_RamfuncsLoadStart),
|
||||||
|
LOAD_SIZE(_RamfuncsLoadSize),
|
||||||
|
LOAD_END(_RamfuncsLoadEnd),
|
||||||
|
RUN_START(_RamfuncsRunStart),
|
||||||
|
RUN_SIZE(_RamfuncsRunSize),
|
||||||
|
RUN_END(_RamfuncsRunEnd),
|
||||||
|
PAGE = 0, ALIGN(8)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* The following section definitions are required when using the IPC API Drivers */
|
||||||
|
GROUP : > CPU1TOCPU2RAM, PAGE = 1
|
||||||
|
{
|
||||||
|
PUTBUFFER
|
||||||
|
PUTWRITEIDX
|
||||||
|
GETREADIDX
|
||||||
|
}
|
||||||
|
|
||||||
|
GROUP : > CPU2TOCPU1RAM, PAGE = 1
|
||||||
|
{
|
||||||
|
GETBUFFER : TYPE = DSECT
|
||||||
|
GETWRITEIDX : TYPE = DSECT
|
||||||
|
PUTREADIDX : TYPE = DSECT
|
||||||
|
}
|
||||||
|
|
||||||
|
/* The following section definition are for SDFM examples */
|
||||||
|
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
|
||||||
|
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
|
||||||
|
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
|
||||||
|
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
|
||||||
|
Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
//===========================================================================
|
||||||
|
// End of file.
|
||||||
|
//===========================================================================
|
||||||
|
*/
|
||||||
@ -0,0 +1,141 @@
|
|||||||
|
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
PAGE 0 :
|
||||||
|
/* BEGIN is used for the "boot to SARAM" bootloader mode */
|
||||||
|
|
||||||
|
BEGIN : origin = 0x000000, length = 0x000002
|
||||||
|
RAMM0 : origin = 0x000123, length = 0x0002DD
|
||||||
|
RAMD0 : origin = 0x00B000, length = 0x000800
|
||||||
|
RAMLS0 : origin = 0x008000, length = 0x000800
|
||||||
|
RAMLS1 : origin = 0x008800, length = 0x000800
|
||||||
|
RAMLS2 : origin = 0x009000, length = 0x000800
|
||||||
|
RAMLS3 : origin = 0x009800, length = 0x000800
|
||||||
|
RAMLS4 : origin = 0x00A000, length = 0x000800
|
||||||
|
RESET : origin = 0x3FFFC0, length = 0x000002
|
||||||
|
|
||||||
|
/* Flash sectors */
|
||||||
|
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
|
||||||
|
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
|
||||||
|
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
|
||||||
|
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
|
||||||
|
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
|
||||||
|
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
|
||||||
|
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
|
||||||
|
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
|
||||||
|
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
|
||||||
|
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
|
||||||
|
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
|
||||||
|
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
|
||||||
|
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
|
||||||
|
FLASHN : origin = 0x0BE000, length = 0x001FF0 /* on-chip Flash */
|
||||||
|
|
||||||
|
// FLASHN_RSVD : origin = 0x0BFFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
|
||||||
|
|
||||||
|
PAGE 1 :
|
||||||
|
|
||||||
|
BOOT_RSVD : origin = 0x000002, length = 0x000121 /* Part of M0, BOOT rom will use this for stack */
|
||||||
|
RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
|
||||||
|
// RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
|
||||||
|
RAMD1 : origin = 0x00B800, length = 0x000800
|
||||||
|
|
||||||
|
RAMLS5 : origin = 0x00A800, length = 0x000800
|
||||||
|
|
||||||
|
RAMGS0 : origin = 0x00C000, length = 0x001000
|
||||||
|
RAMGS1 : origin = 0x00D000, length = 0x001000
|
||||||
|
RAMGS2 : origin = 0x00E000, length = 0x001000
|
||||||
|
RAMGS3 : origin = 0x00F000, length = 0x001000
|
||||||
|
RAMGS4 : origin = 0x010000, length = 0x001000
|
||||||
|
RAMGS5 : origin = 0x011000, length = 0x001000
|
||||||
|
RAMGS6 : origin = 0x012000, length = 0x001000
|
||||||
|
RAMGS7 : origin = 0x013000, length = 0x001000
|
||||||
|
RAMGS8 : origin = 0x014000, length = 0x001000
|
||||||
|
RAMGS9 : origin = 0x015000, length = 0x001000
|
||||||
|
RAMGS10 : origin = 0x016000, length = 0x001000
|
||||||
|
|
||||||
|
// RAMGS11 : origin = 0x017000, length = 0x000FF8 /* Uncomment for F28374D, F28376D devices */
|
||||||
|
|
||||||
|
// RAMGS11_RSVD : origin = 0x017FF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
|
||||||
|
|
||||||
|
RAMGS11 : origin = 0x017000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
|
||||||
|
RAMGS12 : origin = 0x018000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
|
||||||
|
RAMGS13 : origin = 0x019000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
|
||||||
|
RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
|
||||||
|
RAMGS15 : origin = 0x01B000, length = 0x000FF8 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
|
||||||
|
|
||||||
|
// RAMGS15_RSVD : origin = 0x01BFF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
|
||||||
|
/* Only on F28379D, F28377D, F28375D devices. Remove line on other devices. */
|
||||||
|
|
||||||
|
CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
|
||||||
|
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
|
||||||
|
|
||||||
|
CANA_MSG_RAM : origin = 0x049000, length = 0x000800
|
||||||
|
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
codestart : > BEGIN, PAGE = 0
|
||||||
|
.text : >> RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0
|
||||||
|
.cinit : > RAMM0, PAGE = 0
|
||||||
|
.switch : > RAMM0, PAGE = 0
|
||||||
|
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
|
||||||
|
.stack : > RAMM1, PAGE = 1
|
||||||
|
|
||||||
|
#if defined(__TI_EABI__)
|
||||||
|
.bss : > RAMLS5, PAGE = 1
|
||||||
|
.bss:output : > RAMLS3, PAGE = 0
|
||||||
|
.init_array : > RAMM0, PAGE = 0
|
||||||
|
.const : > RAMLS5, PAGE = 1
|
||||||
|
.data : > RAMLS5, PAGE = 1
|
||||||
|
.sysmem : > RAMLS5, PAGE = 1
|
||||||
|
#else
|
||||||
|
.pinit : > RAMM0, PAGE = 0
|
||||||
|
.ebss : > RAMLS5, PAGE = 1
|
||||||
|
.econst : > RAMLS5, PAGE = 1
|
||||||
|
.esysmem : > RAMLS5, PAGE = 1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
Filter_RegsFile : > RAMGS0, PAGE = 1
|
||||||
|
|
||||||
|
|
||||||
|
ramgs0 : > RAMGS0, PAGE = 1
|
||||||
|
ramgs1 : > RAMGS1, PAGE = 1
|
||||||
|
|
||||||
|
#ifdef __TI_COMPILER_VERSION__
|
||||||
|
#if __TI_COMPILER_VERSION__ >= 15009000
|
||||||
|
.TI.ramfunc : {} > RAMM0, PAGE = 0
|
||||||
|
#else
|
||||||
|
ramfuncs : > RAMM0 PAGE = 0
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* The following section definitions are required when using the IPC API Drivers */
|
||||||
|
GROUP : > CPU1TOCPU2RAM, PAGE = 1
|
||||||
|
{
|
||||||
|
PUTBUFFER
|
||||||
|
PUTWRITEIDX
|
||||||
|
GETREADIDX
|
||||||
|
}
|
||||||
|
|
||||||
|
GROUP : > CPU2TOCPU1RAM, PAGE = 1
|
||||||
|
{
|
||||||
|
GETBUFFER : TYPE = DSECT
|
||||||
|
GETWRITEIDX : TYPE = DSECT
|
||||||
|
PUTREADIDX : TYPE = DSECT
|
||||||
|
}
|
||||||
|
|
||||||
|
/* The following section definition are for SDFM examples */
|
||||||
|
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
|
||||||
|
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
|
||||||
|
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
|
||||||
|
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
|
||||||
|
Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
//===========================================================================
|
||||||
|
// End of file.
|
||||||
|
//===========================================================================
|
||||||
|
*/
|
||||||
Binary file not shown.
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Binary file not shown.
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Binary file not shown.
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Binary file not shown.
Binary file not shown.
@ -0,0 +1,37 @@
|
|||||||
|
[
|
||||||
|
{
|
||||||
|
"directory" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/CPU1_RAM",
|
||||||
|
"command" : "clang++ -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1\" -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device\" -I\"/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/\" -I\"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include\" -DDEBUG -DCPU1 -D_DUAL_HEADERS",
|
||||||
|
"file" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device/F2837xD_CodeStartBranch.asm"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"directory" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/CPU1_RAM",
|
||||||
|
"command" : "clang++ -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1\" -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device\" -I\"/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/\" -I\"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include\" -DDEBUG -DCPU1 -D_DUAL_HEADERS -xc",
|
||||||
|
"file" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device/device.c"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"directory" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/CPU1_RAM",
|
||||||
|
"command" : "clang++ -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1\" -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device\" -I\"/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/\" -I\"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include\" -DDEBUG -DCPU1 -D_DUAL_HEADERS -xc",
|
||||||
|
"file" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/gpio_bitfield_main_cpu1.c"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"directory" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/CPU1_RAM",
|
||||||
|
"command" : "clang++ -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1\" -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device\" -I\"/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/\" -I\"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include\" -DDEBUG -DCPU1 -D_DUAL_HEADERS -xc",
|
||||||
|
"file" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/F2837xD_SysCtrl.c"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"directory" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/CPU1_RAM",
|
||||||
|
"command" : "clang++ -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1\" -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device\" -I\"/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/\" -I\"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include\" -DDEBUG -DCPU1 -D_DUAL_HEADERS",
|
||||||
|
"file" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/F2837xD_usDelay.asm"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"directory" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/CPU1_RAM",
|
||||||
|
"command" : "clang++ -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1\" -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device\" -I\"/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/\" -I\"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include\" -DDEBUG -DCPU1 -D_DUAL_HEADERS -xc",
|
||||||
|
"file" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/F2837xD_GlobalVariableDefs.c"
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"directory" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/CPU1_RAM",
|
||||||
|
"command" : "clang++ -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1\" -I\"/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device\" -I\"/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/\" -I\"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include\" -I\"/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include\" -DDEBUG -DCPU1 -D_DUAL_HEADERS -xc",
|
||||||
|
"file" : "/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/F2837xD_Gpio.c"
|
||||||
|
}
|
||||||
|
]
|
||||||
@ -0,0 +1,156 @@
|
|||||||
|
# FIXED
|
||||||
|
|
||||||
|
F2837xD_GlobalVariableDefs.obj: ../F2837xD_GlobalVariableDefs.c
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_device.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdint.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_ti_config.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/linkage.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_stdint40.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/stdint.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/cdefs.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_types.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_types.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_stdint.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_stdint.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/assert.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdarg.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdbool.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stddef.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_adc.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_analogsubsys.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cla.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clb.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clbxbar.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cmpss.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cputimer.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dac.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dcsm.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dma.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ecap.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_emif.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm_xbar.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_eqep.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_flash.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_gpio.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_i2c.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_input_xbar.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ipc.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_mcbsp.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_memconfig.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_nmiintrupt.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_otp.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_output_xbar.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_piectrl.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_pievect.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sci.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sdfm.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_spi.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sysctrl.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_upp.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xbar.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xint.h
|
||||||
|
F2837xD_GlobalVariableDefs.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_can.h
|
||||||
|
|
||||||
|
../F2837xD_GlobalVariableDefs.c:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_device.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_ti_config.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/linkage.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_stdint40.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/cdefs.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_types.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_types.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/assert.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdarg.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdbool.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stddef.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_adc.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_analogsubsys.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cla.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clb.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clbxbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cmpss.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cputimer.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dac.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dcsm.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dma.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ecap.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_emif.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_eqep.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_flash.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_gpio.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_i2c.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_input_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ipc.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_mcbsp.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_memconfig.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_nmiintrupt.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_otp.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_output_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_piectrl.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_pievect.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sci.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sdfm.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_spi.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sysctrl.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_upp.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xint.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_can.h:
|
||||||
|
|
||||||
Binary file not shown.
@ -0,0 +1,201 @@
|
|||||||
|
# FIXED
|
||||||
|
|
||||||
|
F2837xD_Gpio.obj: ../F2837xD_Gpio.c
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_device.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdint.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_ti_config.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/linkage.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_stdint40.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/stdint.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/cdefs.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_types.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_types.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_stdint.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_stdint.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/assert.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdarg.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdbool.h
|
||||||
|
F2837xD_Gpio.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stddef.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_adc.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_analogsubsys.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cla.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clb.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clbxbar.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cmpss.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cputimer.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dac.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dcsm.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dma.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ecap.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_emif.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm_xbar.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_eqep.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_flash.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_gpio.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_i2c.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_input_xbar.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ipc.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_mcbsp.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_memconfig.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_nmiintrupt.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_otp.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_output_xbar.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_piectrl.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_pievect.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sci.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sdfm.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_spi.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sysctrl.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_upp.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xbar.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xint.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_can.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Examples.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_GlobalPrototypes.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_cputimervars.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Cla_defines.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_EPwm_defines.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Adc_defines.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Emif_defines.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Gpio_defines.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_I2c_defines.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Ipc_defines.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Pie_defines.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Dma_defines.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_SysCtrl_defines.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Upp_defines.h
|
||||||
|
F2837xD_Gpio.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_defaultisr.h
|
||||||
|
|
||||||
|
../F2837xD_Gpio.c:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_device.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_ti_config.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/linkage.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_stdint40.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/cdefs.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_types.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_types.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/assert.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdarg.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdbool.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stddef.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_adc.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_analogsubsys.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cla.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clb.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clbxbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cmpss.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cputimer.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dac.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dcsm.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dma.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ecap.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_emif.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_eqep.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_flash.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_gpio.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_i2c.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_input_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ipc.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_mcbsp.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_memconfig.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_nmiintrupt.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_otp.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_output_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_piectrl.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_pievect.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sci.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sdfm.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_spi.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sysctrl.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_upp.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xint.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_can.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Examples.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_GlobalPrototypes.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_cputimervars.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Cla_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_EPwm_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Adc_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Emif_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Gpio_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_I2c_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Ipc_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Pie_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Dma_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_SysCtrl_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Upp_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_defaultisr.h:
|
||||||
|
|
||||||
Binary file not shown.
@ -0,0 +1,201 @@
|
|||||||
|
# FIXED
|
||||||
|
|
||||||
|
F2837xD_SysCtrl.obj: ../F2837xD_SysCtrl.c
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_device.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdint.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_ti_config.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/linkage.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_stdint40.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/stdint.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/cdefs.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_types.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_types.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_stdint.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_stdint.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/assert.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdarg.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdbool.h
|
||||||
|
F2837xD_SysCtrl.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stddef.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_adc.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_analogsubsys.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cla.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clb.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clbxbar.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cmpss.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cputimer.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dac.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dcsm.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dma.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ecap.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_emif.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm_xbar.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_eqep.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_flash.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_gpio.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_i2c.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_input_xbar.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ipc.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_mcbsp.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_memconfig.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_nmiintrupt.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_otp.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_output_xbar.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_piectrl.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_pievect.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sci.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sdfm.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_spi.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sysctrl.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_upp.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xbar.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xint.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_can.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Examples.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_GlobalPrototypes.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_cputimervars.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Cla_defines.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_EPwm_defines.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Adc_defines.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Emif_defines.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Gpio_defines.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_I2c_defines.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Ipc_defines.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Pie_defines.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Dma_defines.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_SysCtrl_defines.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Upp_defines.h
|
||||||
|
F2837xD_SysCtrl.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_defaultisr.h
|
||||||
|
|
||||||
|
../F2837xD_SysCtrl.c:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_device.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_ti_config.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/linkage.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_stdint40.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/cdefs.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_types.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_types.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/assert.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdarg.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdbool.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stddef.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_adc.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_analogsubsys.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cla.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clb.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clbxbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cmpss.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cputimer.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dac.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dcsm.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dma.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ecap.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_emif.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_eqep.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_flash.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_gpio.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_i2c.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_input_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ipc.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_mcbsp.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_memconfig.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_nmiintrupt.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_otp.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_output_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_piectrl.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_pievect.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sci.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sdfm.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_spi.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sysctrl.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_upp.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xint.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_can.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Examples.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_GlobalPrototypes.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_cputimervars.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Cla_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_EPwm_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Adc_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Emif_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Gpio_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_I2c_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Ipc_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Pie_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Dma_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_SysCtrl_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Upp_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_defaultisr.h:
|
||||||
|
|
||||||
Binary file not shown.
Binary file not shown.
@ -0,0 +1,11 @@
|
|||||||
|
"./F2837xD_GlobalVariableDefs.obj"
|
||||||
|
"./F2837xD_Gpio.obj"
|
||||||
|
"./F2837xD_SysCtrl.obj"
|
||||||
|
"./F2837xD_usDelay.obj"
|
||||||
|
"./gpio_bitfield_main_cpu1.obj"
|
||||||
|
"./device/F2837xD_CodeStartBranch.obj"
|
||||||
|
"./device/device.obj"
|
||||||
|
"../2837xD_RAM_lnk_cpu1.cmd"
|
||||||
|
"../F2837xD_Headers_nonBIOS_cpu1.cmd"
|
||||||
|
"/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/ccs/Debug/driverlib.lib"
|
||||||
|
-llibc.a
|
||||||
Binary file not shown.
@ -0,0 +1,267 @@
|
|||||||
|
# FIXED
|
||||||
|
|
||||||
|
device/device.obj: ../device/device.c
|
||||||
|
device/device.obj: ../device/device.h
|
||||||
|
device/device.obj: ../device/driverlib.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_memmap.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/adc.h
|
||||||
|
device/device.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdbool.h
|
||||||
|
device/device.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_ti_config.h
|
||||||
|
device/device.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/linkage.h
|
||||||
|
device/device.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdint.h
|
||||||
|
device/device.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_stdint40.h
|
||||||
|
device/device.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/stdint.h
|
||||||
|
device/device.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/cdefs.h
|
||||||
|
device/device.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_types.h
|
||||||
|
device/device.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_types.h
|
||||||
|
device/device.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_stdint.h
|
||||||
|
device/device.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_stdint.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_adc.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_sysctl.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_types.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cpu.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/debug.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/asysctl.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_asysctl.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/can.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_can.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/sysctl.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_nmi.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_otp.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/interrupt.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_ints.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_pie.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cla.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_cla.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/clb.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_clb.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cmpss.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_cmpss.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cputimer.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_cputimer.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/dac.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_dac.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/dcsm.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_dcsm.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/dma.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_dma.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/ecap.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_ecap.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/emif.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_emif.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_memcfg.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/epwm.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_epwm.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/eqep.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_eqep.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/flash.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_flash.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/gpio.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_gpio.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_xint.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/xbar.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_clbxbar.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_epwmxbar.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_inputxbar.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_outputxbar.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_xbar.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/hrpwm.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_hrpwm.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/hrpwm.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/i2c.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_i2c.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/hw_reg_inclusive_terminology.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/ipc.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_ipc.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/mcbsp.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_mcbsp.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/memcfg.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/pin_map.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/pin_map_legacy.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/sci.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_sci.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/sdfm.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_sdfm.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/spi.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_spi.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/upp.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_upp.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/version.h
|
||||||
|
device/device.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/driver_inclusive_terminology_mapping.h
|
||||||
|
|
||||||
|
../device/device.c:
|
||||||
|
|
||||||
|
../device/device.h:
|
||||||
|
|
||||||
|
../device/driverlib.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_memmap.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/adc.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdbool.h:
|
||||||
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|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_ti_config.h:
|
||||||
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|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/linkage.h:
|
||||||
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|
||||||
|
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|
||||||
|
|
||||||
|
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|
||||||
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|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/stdint.h:
|
||||||
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|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/cdefs.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_types.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_types.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_stdint.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_adc.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_sysctl.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_types.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cpu.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/debug.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/asysctl.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_asysctl.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/can.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_can.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/sysctl.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_nmi.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_otp.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/interrupt.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_ints.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_pie.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cla.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_cla.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/clb.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_clb.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cmpss.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_cmpss.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cputimer.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_cputimer.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/dac.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_dac.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/dcsm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_dcsm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/dma.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_dma.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/ecap.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_ecap.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/emif.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_emif.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_memcfg.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/epwm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_epwm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/eqep.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_eqep.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/flash.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_flash.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/gpio.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_gpio.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_xint.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/xbar.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_clbxbar.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_epwmxbar.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_inputxbar.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_outputxbar.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_xbar.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/hrpwm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_hrpwm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/hrpwm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/i2c.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_i2c.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/hw_reg_inclusive_terminology.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/ipc.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_ipc.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/mcbsp.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_mcbsp.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/memcfg.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/pin_map.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/pin_map_legacy.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/sci.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_sci.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/sdfm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_sdfm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/spi.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_spi.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/upp.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_upp.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/version.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/driver_inclusive_terminology_mapping.h:
|
||||||
|
|
||||||
Binary file not shown.
@ -0,0 +1,18 @@
|
|||||||
|
################################################################################
|
||||||
|
# Automatically-generated file. Do not edit!
|
||||||
|
################################################################################
|
||||||
|
|
||||||
|
# Each subdirectory must supply rules for building sources it contributes
|
||||||
|
device/%.obj: ../device/%.asm $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
|
||||||
|
@echo 'C2000 Compiler - building file: "$<"'
|
||||||
|
"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 -Ooff --include_path="/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1" --include_path="/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device" --include_path="/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/" --include_path="/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include" --include_path="/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include" --include_path="/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include" --define=DEBUG --define=CPU1 --define=_DUAL_HEADERS --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi --preproc_with_compile --preproc_dependency="device/$(basename $(<F)).d_raw" --obj_directory="device" $(GEN_OPTS__FLAG) "$<"
|
||||||
|
@echo 'Finished building: "$<"'
|
||||||
|
@echo ' '
|
||||||
|
|
||||||
|
device/%.obj: ../device/%.c $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
|
||||||
|
@echo 'C2000 Compiler - building file: "$<"'
|
||||||
|
"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 -Ooff --include_path="/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1" --include_path="/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device" --include_path="/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/" --include_path="/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include" --include_path="/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include" --include_path="/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include" --define=DEBUG --define=CPU1 --define=_DUAL_HEADERS --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi --preproc_with_compile --preproc_dependency="device/$(basename $(<F)).d_raw" --obj_directory="device" $(GEN_OPTS__FLAG) "$<"
|
||||||
|
@echo 'Finished building: "$<"'
|
||||||
|
@echo ' '
|
||||||
|
|
||||||
|
|
||||||
@ -0,0 +1,38 @@
|
|||||||
|
################################################################################
|
||||||
|
# Automatically-generated file. Do not edit!
|
||||||
|
################################################################################
|
||||||
|
|
||||||
|
# Add inputs and outputs from these tool invocations to the build variables
|
||||||
|
ASM_SRCS += \
|
||||||
|
../device/F2837xD_CodeStartBranch.asm
|
||||||
|
|
||||||
|
C_SRCS += \
|
||||||
|
../device/device.c
|
||||||
|
|
||||||
|
C_DEPS += \
|
||||||
|
./device/device.d
|
||||||
|
|
||||||
|
OBJS += \
|
||||||
|
./device/F2837xD_CodeStartBranch.obj \
|
||||||
|
./device/device.obj
|
||||||
|
|
||||||
|
ASM_DEPS += \
|
||||||
|
./device/F2837xD_CodeStartBranch.d
|
||||||
|
|
||||||
|
OBJS__QUOTED += \
|
||||||
|
"device/F2837xD_CodeStartBranch.obj" \
|
||||||
|
"device/device.obj"
|
||||||
|
|
||||||
|
C_DEPS__QUOTED += \
|
||||||
|
"device/device.d"
|
||||||
|
|
||||||
|
ASM_DEPS__QUOTED += \
|
||||||
|
"device/F2837xD_CodeStartBranch.d"
|
||||||
|
|
||||||
|
ASM_SRCS__QUOTED += \
|
||||||
|
"../device/F2837xD_CodeStartBranch.asm"
|
||||||
|
|
||||||
|
C_SRCS__QUOTED += \
|
||||||
|
"../device/device.c"
|
||||||
|
|
||||||
|
|
||||||
@ -0,0 +1,556 @@
|
|||||||
|
******************************************************************************
|
||||||
|
TMS320C2000 Linker Unix v25.11.0
|
||||||
|
******************************************************************************
|
||||||
|
>> Linked Thu Jul 16 11:03:42 2026
|
||||||
|
|
||||||
|
OUTPUT FILE NAME: <gpio_bitfield_cpu1.out>
|
||||||
|
ENTRY POINT SYMBOL: "code_start" address: 00000000
|
||||||
|
|
||||||
|
|
||||||
|
MEMORY CONFIGURATION
|
||||||
|
|
||||||
|
name origin length used unused attr fill
|
||||||
|
---------------------- -------- --------- -------- -------- ---- --------
|
||||||
|
PAGE 0:
|
||||||
|
BEGIN 00000000 00000002 00000002 00000000 RWIX
|
||||||
|
RAMM0 00000123 000002dd 00000010 000002cd RWIX
|
||||||
|
RAMLS0 00008000 00000800 000000d9 00000727 RWIX
|
||||||
|
RAMLS1 00008800 00000800 00000000 00000800 RWIX
|
||||||
|
RAMLS2 00009000 00000800 00000000 00000800 RWIX
|
||||||
|
RAMLS3 00009800 00000800 00000000 00000800 RWIX
|
||||||
|
RAMLS4 0000a000 00000800 00000000 00000800 RWIX
|
||||||
|
RAMD0 0000b000 00000800 00000800 00000000 RWIX
|
||||||
|
FLASHA 00080002 00001ffe 00000000 00001ffe RWIX
|
||||||
|
FLASHB 00082000 00002000 00000000 00002000 RWIX
|
||||||
|
FLASHC 00084000 00002000 00000000 00002000 RWIX
|
||||||
|
FLASHD 00086000 00002000 00000000 00002000 RWIX
|
||||||
|
FLASHE 00088000 00008000 00000000 00008000 RWIX
|
||||||
|
FLASHF 00090000 00008000 00000000 00008000 RWIX
|
||||||
|
FLASHG 00098000 00008000 00000000 00008000 RWIX
|
||||||
|
FLASHH 000a0000 00008000 00000000 00008000 RWIX
|
||||||
|
FLASHI 000a8000 00008000 00000000 00008000 RWIX
|
||||||
|
FLASHJ 000b0000 00008000 00000000 00008000 RWIX
|
||||||
|
FLASHK 000b8000 00002000 00000000 00002000 RWIX
|
||||||
|
FLASHL 000ba000 00002000 00000000 00002000 RWIX
|
||||||
|
FLASHM 000bc000 00002000 00000000 00002000 RWIX
|
||||||
|
FLASHN 000be000 00001ff0 00000000 00001ff0 RWIX
|
||||||
|
RESET 003fffc0 00000002 00000000 00000002 RWIX
|
||||||
|
|
||||||
|
PAGE 1:
|
||||||
|
BOOT_RSVD 00000002 00000121 00000000 00000121 RWIX
|
||||||
|
RAMM1 00000400 000003f8 00000100 000002f8 RWIX
|
||||||
|
ADCARESULT 00000b00 00000018 00000000 00000018 RWIX
|
||||||
|
ADCBRESULT 00000b20 00000018 00000000 00000018 RWIX
|
||||||
|
ADCCRESULT 00000b40 00000018 00000000 00000018 RWIX
|
||||||
|
ADCDRESULT 00000b60 00000018 00000000 00000018 RWIX
|
||||||
|
CPUTIMER0 00000c00 00000008 00000000 00000008 RWIX
|
||||||
|
CPUTIMER1 00000c08 00000008 00000008 00000000 RWIX
|
||||||
|
CPUTIMER2 00000c10 00000008 00000008 00000000 RWIX
|
||||||
|
PIECTRL 00000ce0 0000001a 00000000 0000001a RWIX
|
||||||
|
PIEVECTTABLE 00000d00 00000200 00000000 00000200 RWIX
|
||||||
|
DMA 00001000 00000200 00000000 00000200 RWIX
|
||||||
|
CLA1 00001400 00000080 00000000 00000080 RWIX
|
||||||
|
CLB1LOGICCFG 00003000 00000052 00000000 00000052 RWIX
|
||||||
|
CLB1LOGICCTRL 00003100 00000040 00000000 00000040 RWIX
|
||||||
|
CLB1DATAEXCH 00003200 00000200 00000000 00000200 RWIX
|
||||||
|
CLB2LOGICCFG 00003400 00000052 00000000 00000052 RWIX
|
||||||
|
CLB2LOGICCTRL 00003500 00000040 00000000 00000040 RWIX
|
||||||
|
CLB2DATAEXCH 00003600 00000200 00000000 00000200 RWIX
|
||||||
|
CLB3LOGICCFG 00003800 00000052 00000000 00000052 RWIX
|
||||||
|
CLB3LOGICCTRL 00003900 00000040 00000000 00000040 RWIX
|
||||||
|
CLB3DATAEXCH 00003a00 00000200 00000000 00000200 RWIX
|
||||||
|
CLB4LOGICCFG 00003c00 00000052 00000000 00000052 RWIX
|
||||||
|
CLB4LOGICCTRL 00003d00 00000040 00000000 00000040 RWIX
|
||||||
|
CLB4DATAEXCH 00003e00 00000200 00000000 00000200 RWIX
|
||||||
|
EPWM1 00004000 00000100 00000000 00000100 RWIX
|
||||||
|
EPWM2 00004100 00000100 00000000 00000100 RWIX
|
||||||
|
EPWM3 00004200 00000100 00000000 00000100 RWIX
|
||||||
|
EPWM4 00004300 00000100 00000000 00000100 RWIX
|
||||||
|
EPWM5 00004400 00000100 00000000 00000100 RWIX
|
||||||
|
EPWM6 00004500 00000100 00000000 00000100 RWIX
|
||||||
|
EPWM7 00004600 00000100 00000000 00000100 RWIX
|
||||||
|
EPWM8 00004700 00000100 00000000 00000100 RWIX
|
||||||
|
EPWM9 00004800 00000100 00000000 00000100 RWIX
|
||||||
|
EPWM10 00004900 00000100 00000000 00000100 RWIX
|
||||||
|
EPWM11 00004a00 00000100 00000000 00000100 RWIX
|
||||||
|
EPWM12 00004b00 00000100 00000000 00000100 RWIX
|
||||||
|
ECAP1 00005000 00000020 00000000 00000020 RWIX
|
||||||
|
ECAP2 00005020 00000020 00000000 00000020 RWIX
|
||||||
|
ECAP3 00005040 00000020 00000000 00000020 RWIX
|
||||||
|
ECAP4 00005060 00000020 00000000 00000020 RWIX
|
||||||
|
ECAP5 00005080 00000020 00000000 00000020 RWIX
|
||||||
|
ECAP6 000050a0 00000020 00000000 00000020 RWIX
|
||||||
|
EQEP1 00005100 00000022 00000000 00000022 RWIX
|
||||||
|
EQEP2 00005140 00000022 00000000 00000022 RWIX
|
||||||
|
EQEP3 00005180 00000022 00000000 00000022 RWIX
|
||||||
|
DACA 00005c00 00000008 00000000 00000008 RWIX
|
||||||
|
DACB 00005c10 00000008 00000000 00000008 RWIX
|
||||||
|
DACC 00005c20 00000008 00000000 00000008 RWIX
|
||||||
|
CMPSS1 00005c80 00000020 00000000 00000020 RWIX
|
||||||
|
CMPSS2 00005ca0 00000020 00000000 00000020 RWIX
|
||||||
|
CMPSS3 00005cc0 00000020 00000000 00000020 RWIX
|
||||||
|
CMPSS4 00005ce0 00000020 00000000 00000020 RWIX
|
||||||
|
CMPSS5 00005d00 00000020 00000000 00000020 RWIX
|
||||||
|
CMPSS6 00005d20 00000020 00000000 00000020 RWIX
|
||||||
|
CMPSS7 00005d40 00000020 00000000 00000020 RWIX
|
||||||
|
CMPSS8 00005d60 00000020 00000000 00000020 RWIX
|
||||||
|
SDFM1 00005e00 00000080 00000000 00000080 RWIX
|
||||||
|
SDFM2 00005e80 00000080 00000000 00000080 RWIX
|
||||||
|
MCBSPA 00006000 00000024 00000000 00000024 RWIX
|
||||||
|
MCBSPB 00006040 00000024 00000000 00000024 RWIX
|
||||||
|
SPIA 00006100 00000010 00000000 00000010 RWIX
|
||||||
|
SPIB 00006110 00000010 00000000 00000010 RWIX
|
||||||
|
SPIC 00006120 00000010 00000000 00000010 RWIX
|
||||||
|
UPP 00006200 00000048 00000000 00000048 RWIX
|
||||||
|
WD 00007000 0000002b 0000002b 00000000 RWIX
|
||||||
|
NMIINTRUPT 00007060 00000007 00000000 00000007 RWIX
|
||||||
|
XINT 00007070 0000000b 00000000 0000000b RWIX
|
||||||
|
SCIA 00007200 00000010 00000000 00000010 RWIX
|
||||||
|
SCIB 00007210 00000010 00000000 00000010 RWIX
|
||||||
|
SCIC 00007220 00000010 00000000 00000010 RWIX
|
||||||
|
SCID 00007230 00000010 00000000 00000010 RWIX
|
||||||
|
I2CA 00007300 00000022 00000000 00000022 RWIX
|
||||||
|
I2CB 00007340 00000022 00000000 00000022 RWIX
|
||||||
|
ADCA 00007400 00000080 00000000 00000080 RWIX
|
||||||
|
ADCB 00007480 00000080 00000000 00000080 RWIX
|
||||||
|
ADCC 00007500 00000080 00000000 00000080 RWIX
|
||||||
|
ADCD 00007580 00000080 00000000 00000080 RWIX
|
||||||
|
INPUTXBAR 00007900 00000020 00000020 00000000 RWIX
|
||||||
|
XBAR 00007920 00000020 00000000 00000020 RWIX
|
||||||
|
SYNCSOC 00007940 00000006 00000000 00000006 RWIX
|
||||||
|
DMACLASRCSEL 00007980 0000001a 00000000 0000001a RWIX
|
||||||
|
EPWMXBAR 00007a00 00000040 00000000 00000040 RWIX
|
||||||
|
CLBXBAR 00007a40 00000040 00000000 00000040 RWIX
|
||||||
|
OUTPUTXBAR 00007a80 00000040 00000000 00000040 RWIX
|
||||||
|
GPIOCTRL 00007c00 00000180 00000180 00000000 RWIX
|
||||||
|
GPIODATA 00007f00 00000030 00000030 00000000 RWIX
|
||||||
|
RAMLS5 0000a800 00000800 00000012 000007ee RWIX
|
||||||
|
RAMD1 0000b800 00000800 00000000 00000800 RWIX
|
||||||
|
RAMGS0 0000c000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS1 0000d000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS2 0000e000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS3 0000f000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS4 00010000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS5 00011000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS6 00012000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS7 00013000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS8 00014000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS9 00015000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS10 00016000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS11 00017000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS12 00018000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS13 00019000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS14 0001a000 00001000 00000000 00001000 RWIX
|
||||||
|
RAMGS15 0001b000 00000ff8 00000000 00000ff8 RWIX
|
||||||
|
CPU2TOCPU1RAM 0003f800 00000400 00000000 00000400 RWIX
|
||||||
|
CPU1TOCPU2RAM 0003fc00 00000400 00000000 00000400 RWIX
|
||||||
|
EMIF1 00047000 00000070 00000000 00000070 RWIX
|
||||||
|
EMIF2 00047800 00000070 00000000 00000070 RWIX
|
||||||
|
CANA 00048000 00000200 00000000 00000200 RWIX
|
||||||
|
CANA_MSG_RAM 00049000 00000800 00000000 00000800 RWIX
|
||||||
|
CANB 0004a000 00000200 00000000 00000200 RWIX
|
||||||
|
CANB_MSG_RAM 0004b000 00000800 00000000 00000800 RWIX
|
||||||
|
IPC 00050000 00000024 00000000 00000024 RWIX
|
||||||
|
FLASHPUMPSEMAPHORE 00050024 00000002 00000002 00000000 RWIX
|
||||||
|
DEVCFG 0005d000 0000012e 0000012e 00000000 RWIX
|
||||||
|
ANALOGSUBSYS 0005d180 00000048 0000003e 0000000a RWIX
|
||||||
|
CLKCFG 0005d200 00000032 00000032 00000000 RWIX
|
||||||
|
CPUSYS 0005d300 00000082 00000082 00000000 RWIX
|
||||||
|
ROMPREFETCH 0005e608 00000002 00000000 00000002 RWIX
|
||||||
|
DCSMZ1 0005f000 00000024 00000022 00000002 RWIX
|
||||||
|
DCSMZ2 0005f040 00000024 00000022 00000002 RWIX
|
||||||
|
DCSMCOMMON 0005f070 00000008 00000000 00000008 RWIX
|
||||||
|
MEMCFG 0005f400 00000080 00000000 00000080 RWIX
|
||||||
|
EMIF1CONFIG 0005f480 00000020 00000000 00000020 RWIX
|
||||||
|
EMIF2CONFIG 0005f4a0 00000020 00000000 00000020 RWIX
|
||||||
|
ACCESSPROTECTION 0005f4c0 00000040 00000000 00000040 RWIX
|
||||||
|
MEMORYERROR 0005f500 00000040 00000000 00000040 RWIX
|
||||||
|
ROMWAITSTATE 0005f540 00000002 00000000 00000002 RWIX
|
||||||
|
FLASH0CTRL 0005f800 00000182 00000000 00000182 RWIX
|
||||||
|
FLASH0ECC 0005fb00 00000028 00000000 00000028 RWIX
|
||||||
|
UID 000703c0 00000010 00000000 00000010 RWIX
|
||||||
|
|
||||||
|
|
||||||
|
SECTION ALLOCATION MAP
|
||||||
|
|
||||||
|
output attributes/
|
||||||
|
section page origin length input sections
|
||||||
|
-------- ---- ---------- ---------- ----------------
|
||||||
|
codestart
|
||||||
|
* 0 00000000 00000002
|
||||||
|
00000000 00000002 F2837xD_CodeStartBranch.obj (codestart)
|
||||||
|
|
||||||
|
.cinit 0 00000124 00000010
|
||||||
|
00000124 00000008 (.cinit..data.load) [load image, compression = lzss]
|
||||||
|
0000012c 00000004 (__TI_handler_table)
|
||||||
|
00000130 00000004 (__TI_cinit_table)
|
||||||
|
|
||||||
|
.reset 0 003fffc0 00000000 DSECT
|
||||||
|
|
||||||
|
.stack 1 00000400 00000100 UNINITIALIZED
|
||||||
|
00000400 00000100 --HOLE--
|
||||||
|
|
||||||
|
.init_array
|
||||||
|
* 0 00000123 00000000 UNINITIALIZED
|
||||||
|
|
||||||
|
.data 1 0000a800 0000000a UNINITIALIZED
|
||||||
|
0000a800 00000006 rts2800_fpu32_eabi.lib : exit.c.obj (.data)
|
||||||
|
0000a806 00000002 : _lock.c.obj (.data:_lock)
|
||||||
|
0000a808 00000002 : _lock.c.obj (.data:_unlock)
|
||||||
|
|
||||||
|
.const 1 0000a80a 00000008
|
||||||
|
0000a80a 00000008 F2837xD_SysCtrl.obj (.const)
|
||||||
|
|
||||||
|
GETBUFFER
|
||||||
|
* 0 0003f800 00000000 DSECT
|
||||||
|
|
||||||
|
GETWRITEIDX
|
||||||
|
* 0 0003f800 00000000 DSECT
|
||||||
|
|
||||||
|
PUTREADIDX
|
||||||
|
* 0 0003f800 00000000 DSECT
|
||||||
|
|
||||||
|
AnalogSubsysRegsFile
|
||||||
|
* 1 0005d180 0000003e UNINITIALIZED
|
||||||
|
0005d180 0000003e F2837xD_GlobalVariableDefs.obj (AnalogSubsysRegsFile)
|
||||||
|
|
||||||
|
ClkCfgRegsFile
|
||||||
|
* 1 0005d200 00000032 UNINITIALIZED
|
||||||
|
0005d200 00000032 F2837xD_GlobalVariableDefs.obj (ClkCfgRegsFile)
|
||||||
|
|
||||||
|
CpuTimer1RegsFile
|
||||||
|
* 1 00000c08 00000008 UNINITIALIZED
|
||||||
|
00000c08 00000008 F2837xD_GlobalVariableDefs.obj (CpuTimer1RegsFile)
|
||||||
|
|
||||||
|
CpuTimer2RegsFile
|
||||||
|
* 1 00000c10 00000008 UNINITIALIZED
|
||||||
|
00000c10 00000008 F2837xD_GlobalVariableDefs.obj (CpuTimer2RegsFile)
|
||||||
|
|
||||||
|
CpuSysRegsFile
|
||||||
|
* 1 0005d300 00000082 UNINITIALIZED
|
||||||
|
0005d300 00000082 F2837xD_GlobalVariableDefs.obj (CpuSysRegsFile)
|
||||||
|
|
||||||
|
DevCfgRegsFile
|
||||||
|
* 1 0005d000 0000012e UNINITIALIZED
|
||||||
|
0005d000 0000012e F2837xD_GlobalVariableDefs.obj (DevCfgRegsFile)
|
||||||
|
|
||||||
|
DcsmZ1RegsFile
|
||||||
|
* 1 0005f000 00000022 UNINITIALIZED
|
||||||
|
0005f000 00000022 F2837xD_GlobalVariableDefs.obj (DcsmZ1RegsFile)
|
||||||
|
|
||||||
|
DcsmZ2RegsFile
|
||||||
|
* 1 0005f040 00000022 UNINITIALIZED
|
||||||
|
0005f040 00000022 F2837xD_GlobalVariableDefs.obj (DcsmZ2RegsFile)
|
||||||
|
|
||||||
|
GpioCtrlRegsFile
|
||||||
|
* 1 00007c00 00000180 UNINITIALIZED
|
||||||
|
00007c00 00000180 F2837xD_GlobalVariableDefs.obj (GpioCtrlRegsFile)
|
||||||
|
|
||||||
|
GpioDataRegsFile
|
||||||
|
* 1 00007f00 00000030 UNINITIALIZED
|
||||||
|
00007f00 00000030 F2837xD_GlobalVariableDefs.obj (GpioDataRegsFile)
|
||||||
|
|
||||||
|
FlashPumpSemaphoreRegsFile
|
||||||
|
* 1 00050024 00000002 UNINITIALIZED
|
||||||
|
00050024 00000002 F2837xD_GlobalVariableDefs.obj (FlashPumpSemaphoreRegsFile)
|
||||||
|
|
||||||
|
InputXbarRegsFile
|
||||||
|
* 1 00007900 00000020 UNINITIALIZED
|
||||||
|
00007900 00000020 F2837xD_GlobalVariableDefs.obj (InputXbarRegsFile)
|
||||||
|
|
||||||
|
WdRegsFile
|
||||||
|
* 1 00007000 0000002b UNINITIALIZED
|
||||||
|
00007000 0000002b F2837xD_GlobalVariableDefs.obj (WdRegsFile)
|
||||||
|
|
||||||
|
.text.1 0 00008000 000000d9
|
||||||
|
00008000 0000002a rts2800_fpu32_eabi.lib : fd_cmp28.asm.obj (.text)
|
||||||
|
0000802a 00000029 : exit.c.obj (.text)
|
||||||
|
00008053 00000025 gpio_bitfield_main_cpu1.obj (.text)
|
||||||
|
00008078 0000001c rts2800_fpu32_eabi.lib : fs_tofdfpu32.asm.obj (.text)
|
||||||
|
00008094 00000017 : boot28.asm.obj (.text)
|
||||||
|
000080ab 00000012 : args_main.c.obj (.text)
|
||||||
|
000080bd 00000009 : _lock.c.obj (.text)
|
||||||
|
000080c6 00000008 F2837xD_CodeStartBranch.obj (.text)
|
||||||
|
000080ce 00000008 rts2800_fpu32_eabi.lib : copy_decompress_none.c.obj (.text:decompress:none)
|
||||||
|
000080d6 00000002 : pre_init.c.obj (.text)
|
||||||
|
000080d8 00000001 : startup.c.obj (.text)
|
||||||
|
|
||||||
|
.text.2 0 0000b000 00000800
|
||||||
|
0000b000 000004bb F2837xD_SysCtrl.obj (.text)
|
||||||
|
0000b4bb 00000244 F2837xD_Gpio.obj (.text)
|
||||||
|
0000b6ff 00000088 rts2800_fpu32_eabi.lib : fs_div28.asm.obj (.text)
|
||||||
|
0000b787 0000002e : copy_decompress_lzss.c.obj (.text:decompress:lzss)
|
||||||
|
0000b7b5 0000002b : autoinit.c.obj (.text:__TI_auto_init_nobinit_nopinit)
|
||||||
|
0000b7e0 00000020 : memcpy.c.obj (.text)
|
||||||
|
|
||||||
|
MODULE SUMMARY
|
||||||
|
|
||||||
|
Module code ro data rw data
|
||||||
|
------ ---- ------- -------
|
||||||
|
./
|
||||||
|
F2837xD_SysCtrl.obj 1211 8 0
|
||||||
|
F2837xD_GlobalVariableDefs.obj 0 0 1137
|
||||||
|
F2837xD_Gpio.obj 580 0 0
|
||||||
|
gpio_bitfield_main_cpu1.obj 37 0 0
|
||||||
|
+--+--------------------------------+------+---------+---------+
|
||||||
|
Total: 1828 8 1137
|
||||||
|
|
||||||
|
./device/
|
||||||
|
F2837xD_CodeStartBranch.obj 10 0 0
|
||||||
|
+--+--------------------------------+------+---------+---------+
|
||||||
|
Total: 10 0 0
|
||||||
|
|
||||||
|
/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/lib/rts2800_fpu32_eabi.lib
|
||||||
|
fs_div28.asm.obj 136 0 0
|
||||||
|
exit.c.obj 41 0 6
|
||||||
|
copy_decompress_lzss.c.obj 46 0 0
|
||||||
|
autoinit.c.obj 43 0 0
|
||||||
|
fd_cmp28.asm.obj 42 0 0
|
||||||
|
memcpy.c.obj 32 0 0
|
||||||
|
fs_tofdfpu32.asm.obj 28 0 0
|
||||||
|
boot28.asm.obj 23 0 0
|
||||||
|
args_main.c.obj 18 0 0
|
||||||
|
_lock.c.obj 9 0 4
|
||||||
|
copy_decompress_none.c.obj 8 0 0
|
||||||
|
pre_init.c.obj 2 0 0
|
||||||
|
startup.c.obj 1 0 0
|
||||||
|
+--+--------------------------------+------+---------+---------+
|
||||||
|
Total: 429 0 10
|
||||||
|
|
||||||
|
Stack: 0 0 256
|
||||||
|
Linker Generated: 0 16 0
|
||||||
|
+--+--------------------------------+------+---------+---------+
|
||||||
|
Grand Total: 2267 24 1403
|
||||||
|
|
||||||
|
|
||||||
|
LINKER GENERATED COPY TABLES
|
||||||
|
|
||||||
|
__TI_cinit_table @ 00000130 records: 1, size/record: 4, table size: 4
|
||||||
|
.data: load addr=00000124, load size=00000008 bytes, run addr=0000a800, run size=0000000a bytes, compression=lzss
|
||||||
|
|
||||||
|
|
||||||
|
LINKER GENERATED HANDLER TABLE
|
||||||
|
|
||||||
|
__TI_handler_table @ 0000012c records: 2, size/record: 2, table size: 4
|
||||||
|
index: 0, handler: __TI_decompress_lzss
|
||||||
|
index: 1, handler: __TI_decompress_none
|
||||||
|
|
||||||
|
|
||||||
|
GLOBAL DATA SYMBOLS: SORTED BY DATA PAGE
|
||||||
|
|
||||||
|
address data page name
|
||||||
|
-------- ---------------- ----
|
||||||
|
00000400 10 (00000400) __stack
|
||||||
|
|
||||||
|
00000c08 30 (00000c00) CpuTimer1Regs
|
||||||
|
00000c10 30 (00000c00) CpuTimer2Regs
|
||||||
|
|
||||||
|
00007000 1c0 (00007000) WdRegs
|
||||||
|
|
||||||
|
00007900 1e4 (00007900) InputXbarRegs
|
||||||
|
|
||||||
|
00007c00 1f0 (00007c00) GpioCtrlRegs
|
||||||
|
|
||||||
|
00007f00 1fc (00007f00) GpioDataRegs
|
||||||
|
|
||||||
|
0000a800 2a0 (0000a800) __TI_enable_exit_profile_output
|
||||||
|
0000a802 2a0 (0000a800) __TI_cleanup_ptr
|
||||||
|
0000a804 2a0 (0000a800) __TI_dtors_ptr
|
||||||
|
0000a806 2a0 (0000a800) _lock
|
||||||
|
0000a808 2a0 (0000a800) _unlock
|
||||||
|
|
||||||
|
00050024 1400 (00050000) FlashPumpSemaphoreRegs
|
||||||
|
|
||||||
|
0005d000 1740 (0005d000) DevCfgRegs
|
||||||
|
|
||||||
|
0005d180 1746 (0005d180) AnalogSubsysRegs
|
||||||
|
|
||||||
|
0005d200 1748 (0005d200) ClkCfgRegs
|
||||||
|
|
||||||
|
0005d300 174c (0005d300) CpuSysRegs
|
||||||
|
|
||||||
|
0005f000 17c0 (0005f000) DcsmZ1Regs
|
||||||
|
|
||||||
|
0005f040 17c1 (0005f040) DcsmZ2Regs
|
||||||
|
|
||||||
|
|
||||||
|
GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
|
||||||
|
|
||||||
|
page address name
|
||||||
|
---- ------- ----
|
||||||
|
1 0005d180 AnalogSubsysRegs
|
||||||
|
0 0000b44a AuxAuxClkSel
|
||||||
|
0 0000b434 AuxIntOsc2Sel
|
||||||
|
0 0000b43e AuxXtalOscSel
|
||||||
|
0 0000802a C$$EXIT
|
||||||
|
1 0005d200 ClkCfgRegs
|
||||||
|
0 0000b49e ConfigureTMXAnalogTrim
|
||||||
|
1 0005d300 CpuSysRegs
|
||||||
|
1 00000c08 CpuTimer1Regs
|
||||||
|
1 00000c10 CpuTimer2Regs
|
||||||
|
0 0000b3df CsmUnlock
|
||||||
|
1 0005f000 DcsmZ1Regs
|
||||||
|
1 0005f040 DcsmZ2Regs
|
||||||
|
1 0005d000 DevCfgRegs
|
||||||
|
0 0000b0e3 DisableDog
|
||||||
|
0 0000b0a4 DisablePeripheralClocks
|
||||||
|
1 00050024 FlashPumpSemaphoreRegs
|
||||||
|
0 0000b6b4 GPIO_EnableUnbondedIOPullups
|
||||||
|
0 0000b68f GPIO_EnableUnbondedIOPullupsFor100Pin
|
||||||
|
0 0000b676 GPIO_EnableUnbondedIOPullupsFor176Pin
|
||||||
|
0 0000b6ca GPIO_ReadPin
|
||||||
|
0 0000b61b GPIO_SetupLock
|
||||||
|
0 0000b4fb GPIO_SetupPinMux
|
||||||
|
0 0000b587 GPIO_SetupPinOptions
|
||||||
|
0 0000b644 GPIO_SetupXINT1Gpio
|
||||||
|
0 0000b64e GPIO_SetupXINT2Gpio
|
||||||
|
0 0000b658 GPIO_SetupXINT3Gpio
|
||||||
|
0 0000b662 GPIO_SetupXINT4Gpio
|
||||||
|
0 0000b66c GPIO_SetupXINT5Gpio
|
||||||
|
0 0000b6e1 GPIO_WritePin
|
||||||
|
1 00007c00 GpioCtrlRegs
|
||||||
|
1 00007f00 GpioDataRegs
|
||||||
|
0 0000b468 HALT
|
||||||
|
0 0000b481 HIB
|
||||||
|
0 0000b454 IDLE
|
||||||
|
0 0000b2f0 InitAuxPll
|
||||||
|
0 0000b4bb InitGpio
|
||||||
|
0 0000b020 InitPeripheralClocks
|
||||||
|
0 0000b000 InitSysCtrl
|
||||||
|
0 0000b0f1 InitSysPll
|
||||||
|
1 00007900 InputXbarRegs
|
||||||
|
0 0000b0cb ReleaseFlashPump
|
||||||
|
0 0000b45d STANDBY
|
||||||
|
0 0000b0bc SeizeFlashPump
|
||||||
|
0 0000b0d5 ServiceDog
|
||||||
|
0 0000b400 SysIntOsc1Sel
|
||||||
|
0 0000b410 SysIntOsc2Sel
|
||||||
|
0 0000b424 SysXtalOscSel
|
||||||
|
1 00007000 WdRegs
|
||||||
|
0 00000130 __TI_CINIT_Base
|
||||||
|
0 00000134 __TI_CINIT_Limit
|
||||||
|
0 00000134 __TI_CINIT_Warm
|
||||||
|
0 0000012c __TI_Handler_Table_Base
|
||||||
|
0 00000130 __TI_Handler_Table_Limit
|
||||||
|
1 00000500 __TI_STACK_END
|
||||||
|
abs 00000100 __TI_STACK_SIZE
|
||||||
|
0 0000b7b5 __TI_auto_init_nobinit_nopinit
|
||||||
|
1 0000a802 __TI_cleanup_ptr
|
||||||
|
0 0000b787 __TI_decompress_lzss
|
||||||
|
0 000080ce __TI_decompress_none
|
||||||
|
1 0000a804 __TI_dtors_ptr
|
||||||
|
1 0000a800 __TI_enable_exit_profile_output
|
||||||
|
abs ffffffff __TI_pprof_out_hndl
|
||||||
|
abs ffffffff __TI_prof_data_size
|
||||||
|
abs ffffffff __TI_prof_data_start
|
||||||
|
0 00008000 __c28xabi_cmpd
|
||||||
|
0 0000b6ff __c28xabi_divf
|
||||||
|
0 00008078 __c28xabi_ftod
|
||||||
|
abs ffffffff __c_args__
|
||||||
|
1 00000400 __stack
|
||||||
|
0 000080ab _args_main
|
||||||
|
0 00008094 _c_int00
|
||||||
|
1 0000a806 _lock
|
||||||
|
0 000080c5 _nop
|
||||||
|
0 000080c1 _register_lock
|
||||||
|
0 000080bd _register_unlock
|
||||||
|
0 000080d8 _system_post_cinit
|
||||||
|
0 000080d6 _system_pre_init
|
||||||
|
1 0000a808 _unlock
|
||||||
|
0 0000802a abort
|
||||||
|
0 00000000 code_start
|
||||||
|
0 0000802c exit
|
||||||
|
0 00008053 main
|
||||||
|
0 0000b7e0 memcpy
|
||||||
|
|
||||||
|
|
||||||
|
GLOBAL SYMBOLS: SORTED BY Symbol Address
|
||||||
|
|
||||||
|
page address name
|
||||||
|
---- ------- ----
|
||||||
|
0 00000000 code_start
|
||||||
|
0 0000012c __TI_Handler_Table_Base
|
||||||
|
0 00000130 __TI_CINIT_Base
|
||||||
|
0 00000130 __TI_Handler_Table_Limit
|
||||||
|
0 00000134 __TI_CINIT_Limit
|
||||||
|
0 00000134 __TI_CINIT_Warm
|
||||||
|
0 00008000 __c28xabi_cmpd
|
||||||
|
0 0000802a C$$EXIT
|
||||||
|
0 0000802a abort
|
||||||
|
0 0000802c exit
|
||||||
|
0 00008053 main
|
||||||
|
0 00008078 __c28xabi_ftod
|
||||||
|
0 00008094 _c_int00
|
||||||
|
0 000080ab _args_main
|
||||||
|
0 000080bd _register_unlock
|
||||||
|
0 000080c1 _register_lock
|
||||||
|
0 000080c5 _nop
|
||||||
|
0 000080ce __TI_decompress_none
|
||||||
|
0 000080d6 _system_pre_init
|
||||||
|
0 000080d8 _system_post_cinit
|
||||||
|
0 0000b000 InitSysCtrl
|
||||||
|
0 0000b020 InitPeripheralClocks
|
||||||
|
0 0000b0a4 DisablePeripheralClocks
|
||||||
|
0 0000b0bc SeizeFlashPump
|
||||||
|
0 0000b0cb ReleaseFlashPump
|
||||||
|
0 0000b0d5 ServiceDog
|
||||||
|
0 0000b0e3 DisableDog
|
||||||
|
0 0000b0f1 InitSysPll
|
||||||
|
0 0000b2f0 InitAuxPll
|
||||||
|
0 0000b3df CsmUnlock
|
||||||
|
0 0000b400 SysIntOsc1Sel
|
||||||
|
0 0000b410 SysIntOsc2Sel
|
||||||
|
0 0000b424 SysXtalOscSel
|
||||||
|
0 0000b434 AuxIntOsc2Sel
|
||||||
|
0 0000b43e AuxXtalOscSel
|
||||||
|
0 0000b44a AuxAuxClkSel
|
||||||
|
0 0000b454 IDLE
|
||||||
|
0 0000b45d STANDBY
|
||||||
|
0 0000b468 HALT
|
||||||
|
0 0000b481 HIB
|
||||||
|
0 0000b49e ConfigureTMXAnalogTrim
|
||||||
|
0 0000b4bb InitGpio
|
||||||
|
0 0000b4fb GPIO_SetupPinMux
|
||||||
|
0 0000b587 GPIO_SetupPinOptions
|
||||||
|
0 0000b61b GPIO_SetupLock
|
||||||
|
0 0000b644 GPIO_SetupXINT1Gpio
|
||||||
|
0 0000b64e GPIO_SetupXINT2Gpio
|
||||||
|
0 0000b658 GPIO_SetupXINT3Gpio
|
||||||
|
0 0000b662 GPIO_SetupXINT4Gpio
|
||||||
|
0 0000b66c GPIO_SetupXINT5Gpio
|
||||||
|
0 0000b676 GPIO_EnableUnbondedIOPullupsFor176Pin
|
||||||
|
0 0000b68f GPIO_EnableUnbondedIOPullupsFor100Pin
|
||||||
|
0 0000b6b4 GPIO_EnableUnbondedIOPullups
|
||||||
|
0 0000b6ca GPIO_ReadPin
|
||||||
|
0 0000b6e1 GPIO_WritePin
|
||||||
|
0 0000b6ff __c28xabi_divf
|
||||||
|
0 0000b787 __TI_decompress_lzss
|
||||||
|
0 0000b7b5 __TI_auto_init_nobinit_nopinit
|
||||||
|
0 0000b7e0 memcpy
|
||||||
|
1 00000400 __stack
|
||||||
|
1 00000500 __TI_STACK_END
|
||||||
|
1 00000c08 CpuTimer1Regs
|
||||||
|
1 00000c10 CpuTimer2Regs
|
||||||
|
1 00007000 WdRegs
|
||||||
|
1 00007900 InputXbarRegs
|
||||||
|
1 00007c00 GpioCtrlRegs
|
||||||
|
1 00007f00 GpioDataRegs
|
||||||
|
1 0000a800 __TI_enable_exit_profile_output
|
||||||
|
1 0000a802 __TI_cleanup_ptr
|
||||||
|
1 0000a804 __TI_dtors_ptr
|
||||||
|
1 0000a806 _lock
|
||||||
|
1 0000a808 _unlock
|
||||||
|
1 00050024 FlashPumpSemaphoreRegs
|
||||||
|
1 0005d000 DevCfgRegs
|
||||||
|
1 0005d180 AnalogSubsysRegs
|
||||||
|
1 0005d200 ClkCfgRegs
|
||||||
|
1 0005d300 CpuSysRegs
|
||||||
|
1 0005f000 DcsmZ1Regs
|
||||||
|
1 0005f040 DcsmZ2Regs
|
||||||
|
abs 00000100 __TI_STACK_SIZE
|
||||||
|
abs ffffffff __TI_pprof_out_hndl
|
||||||
|
abs ffffffff __TI_prof_data_size
|
||||||
|
abs ffffffff __TI_prof_data_start
|
||||||
|
abs ffffffff __c_args__
|
||||||
|
|
||||||
|
[84 symbols]
|
||||||
Binary file not shown.
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,435 @@
|
|||||||
|
# FIXED
|
||||||
|
|
||||||
|
gpio_bitfield_main_cpu1.obj: ../gpio_bitfield_main_cpu1.c
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F28x_Project.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Cla_typedefs.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_device.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdint.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_ti_config.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/linkage.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/_stdint40.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/stdint.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/cdefs.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_types.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_types.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/machine/_stdint.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/sys/_stdint.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/assert.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdarg.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stdbool.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include/stddef.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_adc.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_analogsubsys.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cla.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clb.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_clbxbar.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cmpss.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_cputimer.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dac.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dcsm.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_dma.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ecap.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_emif.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_epwm_xbar.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_eqep.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_flash.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_gpio.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_i2c.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_input_xbar.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ipc.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_mcbsp.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_memconfig.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_nmiintrupt.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_otp.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_output_xbar.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_piectrl.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_pievect.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sci.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sdfm.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_spi.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sysctrl.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_upp.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xbar.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xint.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_can.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Examples.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_GlobalPrototypes.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_cputimervars.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Cla_defines.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_EPwm_defines.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Adc_defines.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Emif_defines.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Gpio_defines.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_I2c_defines.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Ipc_defines.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Pie_defines.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Dma_defines.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_SysCtrl_defines.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Upp_defines.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_defaultisr.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device/driverlib.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_memmap.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/adc.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_adc.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_sysctl.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_types.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cpu.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/debug.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/asysctl.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_asysctl.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/can.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_can.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/sysctl.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_nmi.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_otp.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/interrupt.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_ints.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_pie.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cla.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_cla.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/clb.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_clb.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cmpss.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_cmpss.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cputimer.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_cputimer.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/dac.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_dac.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/dcsm.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_dcsm.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/dma.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_dma.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/ecap.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_ecap.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/emif.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_emif.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_memcfg.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/epwm.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_epwm.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/eqep.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_eqep.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/flash.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_flash.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/gpio.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_gpio.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_xint.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/xbar.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_clbxbar.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_epwmxbar.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_inputxbar.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_outputxbar.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_xbar.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/hrpwm.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_hrpwm.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/hrpwm.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/i2c.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_i2c.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/hw_reg_inclusive_terminology.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/ipc.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_ipc.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/mcbsp.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_mcbsp.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/memcfg.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/pin_map.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/pin_map_legacy.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/sci.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_sci.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/sdfm.h
|
||||||
|
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|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/spi.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_spi.h
|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/upp.h
|
||||||
|
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|
||||||
|
gpio_bitfield_main_cpu1.obj: /Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/version.h
|
||||||
|
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|
||||||
|
gpio_bitfield_main_cpu1.obj: /Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device/device.h
|
||||||
|
|
||||||
|
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|
||||||
|
|
||||||
|
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|
||||||
|
|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
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|
||||||
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||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
|
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
|
|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
|
|
||||||
|
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|
||||||
|
|
||||||
|
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|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_flash.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_gpio.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_i2c.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_input_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_ipc.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_mcbsp.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_memconfig.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_nmiintrupt.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_otp.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_output_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_piectrl.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_pievect.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sci.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sdfm.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_spi.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_sysctrl.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_upp.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xbar.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_xint.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include/F2837xD_can.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Examples.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_GlobalPrototypes.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_cputimervars.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Cla_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_EPwm_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Adc_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Emif_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Gpio_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_I2c_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Ipc_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Pie_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Dma_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_SysCtrl_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_Upp_defines.h:
|
||||||
|
|
||||||
|
/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include/F2837xD_defaultisr.h:
|
||||||
|
|
||||||
|
/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device/driverlib.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_memmap.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/adc.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_adc.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_sysctl.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_types.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cpu.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/debug.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/asysctl.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_asysctl.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/can.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_can.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/sysctl.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_nmi.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_otp.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/interrupt.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_ints.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_pie.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cla.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_cla.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/clb.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_clb.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cmpss.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_cmpss.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/cputimer.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_cputimer.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/dac.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_dac.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/dcsm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_dcsm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/dma.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_dma.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/ecap.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_ecap.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/emif.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_emif.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_memcfg.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/epwm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_epwm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/eqep.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_eqep.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/flash.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_flash.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/gpio.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_gpio.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_xint.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/xbar.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_clbxbar.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_epwmxbar.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_inputxbar.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_outputxbar.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_xbar.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/hrpwm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_hrpwm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/hrpwm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/i2c.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_i2c.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/hw_reg_inclusive_terminology.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/ipc.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_ipc.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/mcbsp.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_mcbsp.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/memcfg.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/pin_map.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/pin_map_legacy.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/sci.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_sci.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/sdfm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_sdfm.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/spi.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_spi.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/upp.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/inc/hw_upp.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/version.h:
|
||||||
|
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/driver_inclusive_terminology_mapping.h:
|
||||||
|
|
||||||
|
/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device/device.h:
|
||||||
|
|
||||||
Binary file not shown.
@ -0,0 +1,154 @@
|
|||||||
|
################################################################################
|
||||||
|
# Automatically-generated file. Do not edit!
|
||||||
|
################################################################################
|
||||||
|
|
||||||
|
CG_TOOL_ROOT := /Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS
|
||||||
|
|
||||||
|
GEN_OPTS__FLAG :=
|
||||||
|
GEN_CMDS__FLAG :=
|
||||||
|
|
||||||
|
ORDERED_OBJS += \
|
||||||
|
"./F2837xD_GlobalVariableDefs.obj" \
|
||||||
|
"./F2837xD_Gpio.obj" \
|
||||||
|
"./F2837xD_SysCtrl.obj" \
|
||||||
|
"./F2837xD_usDelay.obj" \
|
||||||
|
"./gpio_bitfield_main_cpu1.obj" \
|
||||||
|
"./device/F2837xD_CodeStartBranch.obj" \
|
||||||
|
"./device/device.obj" \
|
||||||
|
"../2837xD_RAM_lnk_cpu1.cmd" \
|
||||||
|
"../F2837xD_Headers_nonBIOS_cpu1.cmd" \
|
||||||
|
"/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/ccs/Debug/driverlib.lib" \
|
||||||
|
$(GEN_CMDS__FLAG) \
|
||||||
|
-llibc.a \
|
||||||
|
|
||||||
|
-include ../makefile.init
|
||||||
|
|
||||||
|
RM := rm -rf
|
||||||
|
RMDIR := rm -rf
|
||||||
|
|
||||||
|
# All of the sources participating in the build are defined here
|
||||||
|
-include sources.mk
|
||||||
|
-include subdir_vars.mk
|
||||||
|
-include device/subdir_vars.mk
|
||||||
|
-include subdir_rules.mk
|
||||||
|
-include device/subdir_rules.mk
|
||||||
|
-include objects.mk
|
||||||
|
|
||||||
|
ifneq ($(MAKECMDGOALS),clean)
|
||||||
|
ifneq ($(strip $(C55_DEPS)),)
|
||||||
|
-include $(C55_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(C_UPPER_DEPS)),)
|
||||||
|
-include $(C_UPPER_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(S67_DEPS)),)
|
||||||
|
-include $(S67_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(S62_DEPS)),)
|
||||||
|
-include $(S62_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(S_DEPS)),)
|
||||||
|
-include $(S_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(OPT_DEPS)),)
|
||||||
|
-include $(OPT_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(C??_DEPS)),)
|
||||||
|
-include $(C??_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(ASM_UPPER_DEPS)),)
|
||||||
|
-include $(ASM_UPPER_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(S??_DEPS)),)
|
||||||
|
-include $(S??_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(C64_DEPS)),)
|
||||||
|
-include $(C64_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(CXX_DEPS)),)
|
||||||
|
-include $(CXX_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(S64_DEPS)),)
|
||||||
|
-include $(S64_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(CLA_DEPS)),)
|
||||||
|
-include $(CLA_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(S55_DEPS)),)
|
||||||
|
-include $(S55_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(SV7A_DEPS)),)
|
||||||
|
-include $(SV7A_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(C62_DEPS)),)
|
||||||
|
-include $(C62_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(C67_DEPS)),)
|
||||||
|
-include $(C67_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(K_DEPS)),)
|
||||||
|
-include $(K_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(C_DEPS)),)
|
||||||
|
-include $(C_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(CC_DEPS)),)
|
||||||
|
-include $(CC_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(C++_DEPS)),)
|
||||||
|
-include $(C++_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(C43_DEPS)),)
|
||||||
|
-include $(C43_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(S43_DEPS)),)
|
||||||
|
-include $(S43_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(ASM_DEPS)),)
|
||||||
|
-include $(ASM_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(S_UPPER_DEPS)),)
|
||||||
|
-include $(S_UPPER_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(CPP_DEPS)),)
|
||||||
|
-include $(CPP_DEPS)
|
||||||
|
endif
|
||||||
|
ifneq ($(strip $(SA_DEPS)),)
|
||||||
|
-include $(SA_DEPS)
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
|
||||||
|
-include ../makefile.defs
|
||||||
|
|
||||||
|
# Add inputs and outputs from these tool invocations to the build variables
|
||||||
|
EXE_OUTPUTS += \
|
||||||
|
gpio_bitfield_cpu1.out
|
||||||
|
|
||||||
|
EXE_OUTPUTS__QUOTED += \
|
||||||
|
"gpio_bitfield_cpu1.out"
|
||||||
|
|
||||||
|
|
||||||
|
# All Target
|
||||||
|
all: $(OBJS) $(CMD_SRCS) $(LIB_SRCS) $(GEN_CMDS)
|
||||||
|
@$(MAKE) --no-print-directory -Onone "gpio_bitfield_cpu1.out"
|
||||||
|
|
||||||
|
# Tool invocations
|
||||||
|
gpio_bitfield_cpu1.out: $(OBJS) $(CMD_SRCS) $(LIB_SRCS) $(GEN_CMDS)
|
||||||
|
@echo 'C2000 Linker - building target: "$@"'
|
||||||
|
"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 -Ooff --define=DEBUG --define=CPU1 --define=_DUAL_HEADERS --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi -z -m"gpio_bitfield_cpu1.map" --stack_size=0x100 --warn_sections -i"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/lib" -i"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include" --reread_libs --diag_wrap=off --display_error_number --xml_link_info="gpio_bitfield_cpu1_linkInfo.xml" --entry_point=code_start --rom_model -o "gpio_bitfield_cpu1.out" $(ORDERED_OBJS)
|
||||||
|
@echo 'Finished building target: "$@"'
|
||||||
|
@echo ' '
|
||||||
|
|
||||||
|
# Other Targets
|
||||||
|
clean:
|
||||||
|
-$(RM) $(EXE_OUTPUTS__QUOTED)
|
||||||
|
-$(RM) "F2837xD_GlobalVariableDefs.obj" "F2837xD_Gpio.obj" "F2837xD_SysCtrl.obj" "F2837xD_usDelay.obj" "gpio_bitfield_main_cpu1.obj" "device/F2837xD_CodeStartBranch.obj" "device/device.obj"
|
||||||
|
-$(RM) "F2837xD_GlobalVariableDefs.d" "F2837xD_Gpio.d" "F2837xD_SysCtrl.d" "gpio_bitfield_main_cpu1.d" "device/device.d"
|
||||||
|
-$(RM) "F2837xD_usDelay.d" "device/F2837xD_CodeStartBranch.d"
|
||||||
|
-@echo ' '
|
||||||
|
|
||||||
|
.PHONY: all clean dependents
|
||||||
|
.SECONDARY:
|
||||||
|
|
||||||
|
-include ../makefile.targets
|
||||||
|
|
||||||
@ -0,0 +1,8 @@
|
|||||||
|
################################################################################
|
||||||
|
# Automatically-generated file. Do not edit!
|
||||||
|
################################################################################
|
||||||
|
|
||||||
|
USER_OBJS :=
|
||||||
|
|
||||||
|
LIBS := -llibc.a
|
||||||
|
|
||||||
@ -0,0 +1,110 @@
|
|||||||
|
################################################################################
|
||||||
|
# Automatically-generated file. Do not edit!
|
||||||
|
################################################################################
|
||||||
|
|
||||||
|
C55_SRCS :=
|
||||||
|
A_SRCS :=
|
||||||
|
ASM_UPPER_SRCS :=
|
||||||
|
EXE_SRCS :=
|
||||||
|
LDS_UPPER_SRCS :=
|
||||||
|
CPP_SRCS :=
|
||||||
|
CMD_SRCS :=
|
||||||
|
O_SRCS :=
|
||||||
|
ELF_SRCS :=
|
||||||
|
C??_SRCS :=
|
||||||
|
C64_SRCS :=
|
||||||
|
C67_SRCS :=
|
||||||
|
SA_SRCS :=
|
||||||
|
S64_SRCS :=
|
||||||
|
OPT_SRCS :=
|
||||||
|
CXX_SRCS :=
|
||||||
|
S67_SRCS :=
|
||||||
|
S??_SRCS :=
|
||||||
|
SV7A_SRCS :=
|
||||||
|
K_SRCS :=
|
||||||
|
CLA_SRCS :=
|
||||||
|
S55_SRCS :=
|
||||||
|
LD_UPPER_SRCS :=
|
||||||
|
OUT_SRCS :=
|
||||||
|
LIB_SRCS :=
|
||||||
|
ASM_SRCS :=
|
||||||
|
S_UPPER_SRCS :=
|
||||||
|
S43_SRCS :=
|
||||||
|
LD_SRCS :=
|
||||||
|
CMD_UPPER_SRCS :=
|
||||||
|
C_UPPER_SRCS :=
|
||||||
|
C++_SRCS :=
|
||||||
|
C43_SRCS :=
|
||||||
|
OBJ_SRCS :=
|
||||||
|
LDS_SRCS :=
|
||||||
|
S_SRCS :=
|
||||||
|
CC_SRCS :=
|
||||||
|
S62_SRCS :=
|
||||||
|
C62_SRCS :=
|
||||||
|
C_SRCS :=
|
||||||
|
C55_DEPS :=
|
||||||
|
C_UPPER_DEPS :=
|
||||||
|
S67_DEPS :=
|
||||||
|
S62_DEPS :=
|
||||||
|
S_DEPS :=
|
||||||
|
OPT_DEPS :=
|
||||||
|
C??_DEPS :=
|
||||||
|
ASM_UPPER_DEPS :=
|
||||||
|
S??_DEPS :=
|
||||||
|
C64_DEPS :=
|
||||||
|
CXX_DEPS :=
|
||||||
|
S64_DEPS :=
|
||||||
|
CLA_DEPS :=
|
||||||
|
S55_DEPS :=
|
||||||
|
SV7A_DEPS :=
|
||||||
|
EXE_OUTPUTS :=
|
||||||
|
C62_DEPS :=
|
||||||
|
C67_DEPS :=
|
||||||
|
K_DEPS :=
|
||||||
|
C_DEPS :=
|
||||||
|
CC_DEPS :=
|
||||||
|
BIN_OUTPUTS :=
|
||||||
|
C++_DEPS :=
|
||||||
|
C43_DEPS :=
|
||||||
|
S43_DEPS :=
|
||||||
|
OBJS :=
|
||||||
|
ASM_DEPS :=
|
||||||
|
S_UPPER_DEPS :=
|
||||||
|
CPP_DEPS :=
|
||||||
|
SA_DEPS :=
|
||||||
|
C++_DEPS__QUOTED :=
|
||||||
|
OPT_DEPS__QUOTED :=
|
||||||
|
SA_DEPS__QUOTED :=
|
||||||
|
S_UPPER_DEPS__QUOTED :=
|
||||||
|
C??_DEPS__QUOTED :=
|
||||||
|
S67_DEPS__QUOTED :=
|
||||||
|
C55_DEPS__QUOTED :=
|
||||||
|
CC_DEPS__QUOTED :=
|
||||||
|
ASM_UPPER_DEPS__QUOTED :=
|
||||||
|
SV7A_DEPS__QUOTED :=
|
||||||
|
S??_DEPS__QUOTED :=
|
||||||
|
OBJS__QUOTED :=
|
||||||
|
C67_DEPS__QUOTED :=
|
||||||
|
K_DEPS__QUOTED :=
|
||||||
|
S55_DEPS__QUOTED :=
|
||||||
|
C62_DEPS__QUOTED :=
|
||||||
|
C_DEPS__QUOTED :=
|
||||||
|
C_UPPER_DEPS__QUOTED :=
|
||||||
|
C43_DEPS__QUOTED :=
|
||||||
|
CPP_DEPS__QUOTED :=
|
||||||
|
BIN_OUTPUTS__QUOTED :=
|
||||||
|
C64_DEPS__QUOTED :=
|
||||||
|
CXX_DEPS__QUOTED :=
|
||||||
|
CLA_DEPS__QUOTED :=
|
||||||
|
S_DEPS__QUOTED :=
|
||||||
|
ASM_DEPS__QUOTED :=
|
||||||
|
S43_DEPS__QUOTED :=
|
||||||
|
EXE_OUTPUTS__QUOTED :=
|
||||||
|
S64_DEPS__QUOTED :=
|
||||||
|
S62_DEPS__QUOTED :=
|
||||||
|
|
||||||
|
# Every subdirectory with source files must be described here
|
||||||
|
SUBDIRS := \
|
||||||
|
. \
|
||||||
|
device \
|
||||||
|
|
||||||
@ -0,0 +1,18 @@
|
|||||||
|
################################################################################
|
||||||
|
# Automatically-generated file. Do not edit!
|
||||||
|
################################################################################
|
||||||
|
|
||||||
|
# Each subdirectory must supply rules for building sources it contributes
|
||||||
|
%.obj: ../%.c $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
|
||||||
|
@echo 'C2000 Compiler - building file: "$<"'
|
||||||
|
"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 -Ooff --include_path="/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1" --include_path="/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device" --include_path="/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/" --include_path="/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include" --include_path="/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include" --include_path="/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include" --define=DEBUG --define=CPU1 --define=_DUAL_HEADERS --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi --preproc_with_compile --preproc_dependency="$(basename $(<F)).d_raw" $(GEN_OPTS__FLAG) "$<"
|
||||||
|
@echo 'Finished building: "$<"'
|
||||||
|
@echo ' '
|
||||||
|
|
||||||
|
%.obj: ../%.asm $(GEN_OPTS) | $(GEN_FILES) $(GEN_MISC_FILES)
|
||||||
|
@echo 'C2000 Compiler - building file: "$<"'
|
||||||
|
"/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 -Ooff --include_path="/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1" --include_path="/Users/gmarx/lwc/workshops/f28379d/lab-examples/1-gpios-dual-lab/gpio_bitfield_cpu1/device" --include_path="/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/" --include_path="/Applications/ti/ccs2050/ccs/tools/compiler/ti-cgt-c2000_25.11.0.LTS/include" --include_path="/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/headers/include" --include_path="/Users/gmarx/ti/C2000Ware_26_00_00_00/device_support/f2837xd/common/include" --define=DEBUG --define=CPU1 --define=_DUAL_HEADERS --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --abi=eabi --preproc_with_compile --preproc_dependency="$(basename $(<F)).d_raw" $(GEN_OPTS__FLAG) "$<"
|
||||||
|
@echo 'Finished building: "$<"'
|
||||||
|
@echo ' '
|
||||||
|
|
||||||
|
|
||||||
@ -0,0 +1,63 @@
|
|||||||
|
################################################################################
|
||||||
|
# Automatically-generated file. Do not edit!
|
||||||
|
################################################################################
|
||||||
|
|
||||||
|
# Add inputs and outputs from these tool invocations to the build variables
|
||||||
|
CMD_SRCS += \
|
||||||
|
../2837xD_RAM_lnk_cpu1.cmd \
|
||||||
|
../F2837xD_Headers_nonBIOS_cpu1.cmd
|
||||||
|
|
||||||
|
LIB_SRCS += \
|
||||||
|
/Applications/ti/c2000/C2000Ware_26_00_00_00/driverlib/f2837xd/driverlib/ccs/Debug/driverlib.lib
|
||||||
|
|
||||||
|
ASM_SRCS += \
|
||||||
|
../F2837xD_usDelay.asm
|
||||||
|
|
||||||
|
C_SRCS += \
|
||||||
|
../F2837xD_GlobalVariableDefs.c \
|
||||||
|
../F2837xD_Gpio.c \
|
||||||
|
../F2837xD_SysCtrl.c \
|
||||||
|
../gpio_bitfield_main_cpu1.c
|
||||||
|
|
||||||
|
C_DEPS += \
|
||||||
|
./F2837xD_GlobalVariableDefs.d \
|
||||||
|
./F2837xD_Gpio.d \
|
||||||
|
./F2837xD_SysCtrl.d \
|
||||||
|
./gpio_bitfield_main_cpu1.d
|
||||||
|
|
||||||
|
OBJS += \
|
||||||
|
./F2837xD_GlobalVariableDefs.obj \
|
||||||
|
./F2837xD_Gpio.obj \
|
||||||
|
./F2837xD_SysCtrl.obj \
|
||||||
|
./F2837xD_usDelay.obj \
|
||||||
|
./gpio_bitfield_main_cpu1.obj
|
||||||
|
|
||||||
|
ASM_DEPS += \
|
||||||
|
./F2837xD_usDelay.d
|
||||||
|
|
||||||
|
OBJS__QUOTED += \
|
||||||
|
"F2837xD_GlobalVariableDefs.obj" \
|
||||||
|
"F2837xD_Gpio.obj" \
|
||||||
|
"F2837xD_SysCtrl.obj" \
|
||||||
|
"F2837xD_usDelay.obj" \
|
||||||
|
"gpio_bitfield_main_cpu1.obj"
|
||||||
|
|
||||||
|
C_DEPS__QUOTED += \
|
||||||
|
"F2837xD_GlobalVariableDefs.d" \
|
||||||
|
"F2837xD_Gpio.d" \
|
||||||
|
"F2837xD_SysCtrl.d" \
|
||||||
|
"gpio_bitfield_main_cpu1.d"
|
||||||
|
|
||||||
|
ASM_DEPS__QUOTED += \
|
||||||
|
"F2837xD_usDelay.d"
|
||||||
|
|
||||||
|
C_SRCS__QUOTED += \
|
||||||
|
"../F2837xD_GlobalVariableDefs.c" \
|
||||||
|
"../F2837xD_Gpio.c" \
|
||||||
|
"../F2837xD_SysCtrl.c" \
|
||||||
|
"../gpio_bitfield_main_cpu1.c"
|
||||||
|
|
||||||
|
ASM_SRCS__QUOTED += \
|
||||||
|
"../F2837xD_usDelay.asm"
|
||||||
|
|
||||||
|
|
||||||
@ -0,0 +1,961 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: F2837xD_globalvariabledefs.c
|
||||||
|
//
|
||||||
|
// TITLE: F2837xD Global Variables and Data Section Pragmas.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// $Release Date: $
|
||||||
|
// $Copyright:
|
||||||
|
// Copyright (C) 2013-2026 Texas Instruments Incorporated - http://www.ti.com/
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "F2837xD_device.h" // F2837xD Headerfile Include File
|
||||||
|
|
||||||
|
//---------------------------------------------------------------------------
|
||||||
|
// Define Global Peripheral Variables:
|
||||||
|
//
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("AccessProtectionRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(AccessProtectionRegs,"AccessProtectionRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ACCESS_PROTECTION_REGS AccessProtectionRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("AdcaRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(AdcaRegs,"AdcaRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ADC_REGS AdcaRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("AdcbRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(AdcbRegs,"AdcbRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ADC_REGS AdcbRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("AdccRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(AdccRegs,"AdccRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ADC_REGS AdccRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("AdcdRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(AdcdRegs,"AdcdRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ADC_REGS AdcdRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("AdcaResultRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(AdcaResultRegs,"AdcaResultRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ADC_RESULT_REGS AdcaResultRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("AdcbResultRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(AdcbResultRegs,"AdcbResultRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ADC_RESULT_REGS AdcbResultRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("AdccResultRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(AdccResultRegs,"AdccResultRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ADC_RESULT_REGS AdccResultRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("AdcdResultRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(AdcdResultRegs,"AdcdResultRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ADC_RESULT_REGS AdcdResultRegs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("AnalogSubsysRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(AnalogSubsysRegs,"AnalogSubsysRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ANALOG_SUBSYS_REGS AnalogSubsysRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
#if __TI_COMPILER_VERSION__ >= 16006000
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("CanaRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(CanaRegs,"CanaRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CAN_REGS CanaRegs;
|
||||||
|
#endif // __TI_COMPILER_VERSION__ >= 16006000
|
||||||
|
|
||||||
|
#if __TI_COMPILER_VERSION__ >= 16006000
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("CanbRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(CanbRegs,"CanbRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CAN_REGS CanbRegs;
|
||||||
|
#endif // __TI_COMPILER_VERSION__ >= 16006000
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Cla1RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Cla1Regs,"Cla1RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLA_REGS Cla1Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Clb1DataExchRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Clb1DataExchRegs,"Clb1DataExchRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_DATA_EXCHANGE_REGS Clb1DataExchRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Clb2DataExchRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Clb2DataExchRegs,"Clb2DataExchRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_DATA_EXCHANGE_REGS Clb2DataExchRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Clb3DataExchRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Clb3DataExchRegs,"Clb3DataExchRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_DATA_EXCHANGE_REGS Clb3DataExchRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Clb4DataExchRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Clb4DataExchRegs,"Clb4DataExchRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_DATA_EXCHANGE_REGS Clb4DataExchRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Clb1LogicCfgRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Clb1LogicCfgRegs,"Clb1LogicCfgRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_LOGIC_CONFIG_REGS Clb1LogicCfgRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Clb2LogicCfgRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Clb2LogicCfgRegs,"Clb2LogicCfgRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_LOGIC_CONFIG_REGS Clb2LogicCfgRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Clb3LogicCfgRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Clb3LogicCfgRegs,"Clb3LogicCfgRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_LOGIC_CONFIG_REGS Clb3LogicCfgRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Clb4LogicCfgRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Clb4LogicCfgRegs,"Clb4LogicCfgRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_LOGIC_CONFIG_REGS Clb4LogicCfgRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Clb1LogicCtrlRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Clb1LogicCtrlRegs,"Clb1LogicCtrlRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_LOGIC_CONTROL_REGS Clb1LogicCtrlRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Clb2LogicCtrlRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Clb2LogicCtrlRegs,"Clb2LogicCtrlRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_LOGIC_CONTROL_REGS Clb2LogicCtrlRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Clb3LogicCtrlRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Clb3LogicCtrlRegs,"Clb3LogicCtrlRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_LOGIC_CONTROL_REGS Clb3LogicCtrlRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Clb4LogicCtrlRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Clb4LogicCtrlRegs,"Clb4LogicCtrlRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_LOGIC_CONTROL_REGS Clb4LogicCtrlRegs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("ClbXbarRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(ClbXbarRegs,"ClbXbarRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLB_XBAR_REGS ClbXbarRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("ClkCfgRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(ClkCfgRegs,"ClkCfgRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CLK_CFG_REGS ClkCfgRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Cmpss1RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Cmpss1Regs,"Cmpss1RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CMPSS_REGS Cmpss1Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Cmpss2RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Cmpss2Regs,"Cmpss2RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CMPSS_REGS Cmpss2Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Cmpss3RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Cmpss3Regs,"Cmpss3RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CMPSS_REGS Cmpss3Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Cmpss4RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Cmpss4Regs,"Cmpss4RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CMPSS_REGS Cmpss4Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Cmpss5RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Cmpss5Regs,"Cmpss5RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CMPSS_REGS Cmpss5Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Cmpss6RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Cmpss6Regs,"Cmpss6RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CMPSS_REGS Cmpss6Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Cmpss7RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Cmpss7Regs,"Cmpss7RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CMPSS_REGS Cmpss7Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Cmpss8RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Cmpss8Regs,"Cmpss8RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CMPSS_REGS Cmpss8Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("CpuTimer0RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(CpuTimer0Regs,"CpuTimer0RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CPUTIMER_REGS CpuTimer0Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("CpuTimer1RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(CpuTimer1Regs,"CpuTimer1RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CPUTIMER_REGS CpuTimer1Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("CpuTimer2RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(CpuTimer2Regs,"CpuTimer2RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CPUTIMER_REGS CpuTimer2Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("CpuSysRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(CpuSysRegs,"CpuSysRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct CPU_SYS_REGS CpuSysRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("DacaRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(DacaRegs,"DacaRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct DAC_REGS DacaRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("DacbRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(DacbRegs,"DacbRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct DAC_REGS DacbRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("DaccRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(DaccRegs,"DaccRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct DAC_REGS DaccRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("DcsmCommonRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(DcsmCommonRegs,"DcsmCommonRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct DCSM_COMMON_REGS DcsmCommonRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("DcsmZ1RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(DcsmZ1Regs,"DcsmZ1RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct DCSM_Z1_REGS DcsmZ1Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("DcsmZ2RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(DcsmZ2Regs,"DcsmZ2RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct DCSM_Z2_REGS DcsmZ2Regs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("DevCfgRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(DevCfgRegs,"DevCfgRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct DEV_CFG_REGS DevCfgRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("DmaClaSrcSelRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(DmaClaSrcSelRegs,"DmaClaSrcSelRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct DMA_CLA_SRC_SEL_REGS DmaClaSrcSelRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("DmaRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(DmaRegs,"DmaRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct DMA_REGS DmaRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("ECap1RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(ECap1Regs,"ECap1RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ECAP_REGS ECap1Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("ECap2RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(ECap2Regs,"ECap2RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ECAP_REGS ECap2Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("ECap3RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(ECap3Regs,"ECap3RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ECAP_REGS ECap3Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("ECap4RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(ECap4Regs,"ECap4RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ECAP_REGS ECap4Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("ECap5RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(ECap5Regs,"ECap5RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ECAP_REGS ECap5Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("ECap6RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(ECap6Regs,"ECap6RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ECAP_REGS ECap6Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Emif1ConfigRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Emif1ConfigRegs,"Emif1ConfigRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EMIF1_CONFIG_REGS Emif1ConfigRegs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Emif2ConfigRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Emif2ConfigRegs,"Emif2ConfigRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EMIF2_CONFIG_REGS Emif2ConfigRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Emif1RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Emif1Regs,"Emif1RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EMIF_REGS Emif1Regs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Emif2RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Emif2Regs,"Emif2RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EMIF_REGS Emif2Regs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwm1RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwm1Regs,"EPwm1RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_REGS EPwm1Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwm2RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwm2Regs,"EPwm2RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_REGS EPwm2Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwm3RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwm3Regs,"EPwm3RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_REGS EPwm3Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwm4RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwm4Regs,"EPwm4RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_REGS EPwm4Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwm5RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwm5Regs,"EPwm5RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_REGS EPwm5Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwm6RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwm6Regs,"EPwm6RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_REGS EPwm6Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwm7RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwm7Regs,"EPwm7RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_REGS EPwm7Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwm8RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwm8Regs,"EPwm8RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_REGS EPwm8Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwm9RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwm9Regs,"EPwm9RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_REGS EPwm9Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwm10RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwm10Regs,"EPwm10RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_REGS EPwm10Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwm11RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwm11Regs,"EPwm11RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_REGS EPwm11Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwm12RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwm12Regs,"EPwm12RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_REGS EPwm12Regs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EPwmXbarRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EPwmXbarRegs,"EPwmXbarRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EPWM_XBAR_REGS EPwmXbarRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EQep1RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EQep1Regs,"EQep1RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EQEP_REGS EQep1Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EQep2RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EQep2Regs,"EQep2RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EQEP_REGS EQep2Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("EQep3RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(EQep3Regs,"EQep3RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct EQEP_REGS EQep3Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Flash0CtrlRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Flash0CtrlRegs,"Flash0CtrlRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct FLASH_CTRL_REGS Flash0CtrlRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Flash0EccRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Flash0EccRegs,"Flash0EccRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct FLASH_ECC_REGS Flash0EccRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("FlashPumpSemaphoreRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(FlashPumpSemaphoreRegs,"FlashPumpSemaphoreRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct FLASH_PUMP_SEMAPHORE_REGS FlashPumpSemaphoreRegs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("GpioCtrlRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(GpioCtrlRegs,"GpioCtrlRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct GPIO_CTRL_REGS GpioCtrlRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("GpioDataRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(GpioDataRegs,"GpioDataRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct GPIO_DATA_REGS GpioDataRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("I2caRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(I2caRegs,"I2caRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct I2C_REGS I2caRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("I2cbRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(I2cbRegs,"I2cbRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct I2C_REGS I2cbRegs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("InputXbarRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(InputXbarRegs,"InputXbarRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct INPUT_XBAR_REGS InputXbarRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("IpcRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(IpcRegs,"IpcRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct IPC_REGS_CPU1 IpcRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
#ifdef CPU2
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("IpcRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(IpcRegs,"IpcRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct IPC_REGS_CPU2 IpcRegs;
|
||||||
|
#endif // ifdef CPU2
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("MemoryErrorRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(MemoryErrorRegs,"MemoryErrorRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct MEMORY_ERROR_REGS MemoryErrorRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("MemCfgRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(MemCfgRegs,"MemCfgRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct MEM_CFG_REGS MemCfgRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("McbspaRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(McbspaRegs,"McbspaRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct McBSP_REGS McbspaRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("McbspbRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(McbspbRegs,"McbspbRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct McBSP_REGS McbspbRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("NmiIntruptRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(NmiIntruptRegs,"NmiIntruptRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct NMI_INTRUPT_REGS NmiIntruptRegs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("OutputXbarRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(OutputXbarRegs,"OutputXbarRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct OUTPUT_XBAR_REGS OutputXbarRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("PieCtrlRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(PieCtrlRegs,"PieCtrlRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct PIE_CTRL_REGS PieCtrlRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("PieVectTableFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(PieVectTable,"PieVectTableFile");
|
||||||
|
#endif
|
||||||
|
volatile struct PIE_VECT_TABLE PieVectTable;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("RomPrefetchRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(RomPrefetchRegs,"RomPrefetchRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ROM_PREFETCH_REGS RomPrefetchRegs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("RomWaitStateRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(RomWaitStateRegs,"RomWaitStateRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct ROM_WAIT_STATE_REGS RomWaitStateRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("SciaRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(SciaRegs,"SciaRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct SCI_REGS SciaRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("ScibRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(ScibRegs,"ScibRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct SCI_REGS ScibRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("ScicRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(ScicRegs,"ScicRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct SCI_REGS ScicRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("ScidRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(ScidRegs,"ScidRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct SCI_REGS ScidRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Sdfm1RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Sdfm1Regs,"Sdfm1RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct SDFM_REGS Sdfm1Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("Sdfm2RegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(Sdfm2Regs,"Sdfm2RegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct SDFM_REGS Sdfm2Regs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("SpiaRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(SpiaRegs,"SpiaRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct SPI_REGS SpiaRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("SpibRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(SpibRegs,"SpibRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct SPI_REGS SpibRegs;
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("SpicRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(SpicRegs,"SpicRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct SPI_REGS SpicRegs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("SyncSocRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(SyncSocRegs,"SyncSocRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct SYNC_SOC_REGS SyncSocRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("UidRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(UidRegs,"UidRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct UID_REGS UidRegs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("UppRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(UppRegs,"UppRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct UPP_REGS UppRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("WdRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(WdRegs,"WdRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct WD_REGS WdRegs;
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("XbarRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(XbarRegs,"XbarRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct XBAR_REGS XbarRegs;
|
||||||
|
#endif // ifdef CPU1
|
||||||
|
|
||||||
|
//----------------------------------------
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma DATA_SECTION("XintRegsFile")
|
||||||
|
#else
|
||||||
|
#pragma DATA_SECTION(XintRegs,"XintRegsFile");
|
||||||
|
#endif
|
||||||
|
volatile struct XINT_REGS XintRegs;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
//===========================================================================
|
||||||
|
// End of file.
|
||||||
|
//===========================================================================
|
||||||
|
|
||||||
|
|
||||||
@ -0,0 +1,506 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: F2837xD_Gpio.c
|
||||||
|
//
|
||||||
|
// TITLE: GPIO module support functions
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// $Release Date: $
|
||||||
|
// $Copyright:
|
||||||
|
// Copyright (C) 2013-2026 Texas Instruments Incorporated - http://www.ti.com/
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
//
|
||||||
|
// Included Files
|
||||||
|
//
|
||||||
|
#include "F2837xD_device.h"
|
||||||
|
#include "F2837xD_Examples.h"
|
||||||
|
|
||||||
|
//
|
||||||
|
//Low-level functions for GPIO configuration (CPU1 only)
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//
|
||||||
|
// InitGpio - Sets all pins to be muxed to GPIO in input mode.
|
||||||
|
// Also resets CPU control to CPU1 and disables open
|
||||||
|
// drain and polarity inversion and sets the qualification to
|
||||||
|
// synchronous. Also unlocks all GPIOs. Only one CPU should call
|
||||||
|
// this function.
|
||||||
|
//
|
||||||
|
void InitGpio()
|
||||||
|
{
|
||||||
|
volatile Uint32 *gpioBaseAddr;
|
||||||
|
Uint16 regOffset;
|
||||||
|
|
||||||
|
//
|
||||||
|
//Disable pin locks
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
GpioCtrlRegs.GPALOCK.all = 0x00000000;
|
||||||
|
GpioCtrlRegs.GPBLOCK.all = 0x00000000;
|
||||||
|
GpioCtrlRegs.GPCLOCK.all = 0x00000000;
|
||||||
|
GpioCtrlRegs.GPDLOCK.all = 0x00000000;
|
||||||
|
GpioCtrlRegs.GPELOCK.all = 0x00000000;
|
||||||
|
GpioCtrlRegs.GPFLOCK.all = 0x00000000;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Fill all registers with zeros. Writing to each register separately
|
||||||
|
// for six GPIO modules would make this function *very* long.
|
||||||
|
// Fortunately, we'd be writing them all with zeros anyway, so this
|
||||||
|
// saves a lot of space.
|
||||||
|
//
|
||||||
|
gpioBaseAddr = (Uint32 *)&GpioCtrlRegs;
|
||||||
|
for (regOffset = 0; regOffset < sizeof(GpioCtrlRegs)/2; regOffset++)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
//Hack to avoid enabling pull-ups on all pins. GPyPUD is offset
|
||||||
|
//0x0C in each register group of 0x40 words. Since this is a
|
||||||
|
//32-bit pointer, the addresses must be divided by 2.
|
||||||
|
//
|
||||||
|
if (regOffset % (0x40/2) != (0x0C/2))
|
||||||
|
{
|
||||||
|
gpioBaseAddr[regOffset] = 0x00000000;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
gpioBaseAddr = (Uint32 *)&GpioDataRegs;
|
||||||
|
for (regOffset = 0; regOffset < sizeof(GpioDataRegs)/2; regOffset++)
|
||||||
|
{
|
||||||
|
gpioBaseAddr[regOffset] = 0x00000000;
|
||||||
|
}
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO_SetupPinMux - Set the peripheral muxing for the specified pin. The
|
||||||
|
// appropriate parameters can be found in the GPIO Muxed
|
||||||
|
// Pins table(4.4) in the datasheet. Use the GPIO index
|
||||||
|
// row (0 to 15) to select a muxing option for the GPIO.
|
||||||
|
//
|
||||||
|
void GPIO_SetupPinMux(Uint16 gpioNumber, Uint16 cpu, Uint16 muxPosition)
|
||||||
|
{
|
||||||
|
volatile Uint32 *gpioBaseAddr;
|
||||||
|
volatile Uint32 *mux, *gmux, *csel;
|
||||||
|
Uint16 pin32, pin16, pin8;
|
||||||
|
|
||||||
|
pin32 = gpioNumber % 32;
|
||||||
|
pin16 = gpioNumber % 16;
|
||||||
|
pin8 = gpioNumber % 8;
|
||||||
|
gpioBaseAddr = (Uint32 *)&GpioCtrlRegs + (gpioNumber/32)*GPY_CTRL_OFFSET;
|
||||||
|
|
||||||
|
//
|
||||||
|
//Sanity check for valid cpu and peripheral values
|
||||||
|
//
|
||||||
|
if (cpu > GPIO_MUX_CPU2CLA || muxPosition > 0xF)
|
||||||
|
return;
|
||||||
|
|
||||||
|
//
|
||||||
|
//Create pointers to the appropriate registers. This is a workaround
|
||||||
|
//for the way GPIO registers are defined. The standard definition
|
||||||
|
//in the header file makes it very easy to do named accesses of one
|
||||||
|
//register or bit, but hard to do arbitrary numerical accesses. It's
|
||||||
|
//easier to have an array of GPIO modules with identical registers,
|
||||||
|
//including arrays for multi-register groups like GPyCSEL1-4. But
|
||||||
|
//the header file doesn't define anything we can turn into an array,
|
||||||
|
//so manual pointer arithmetic is used instead.
|
||||||
|
//
|
||||||
|
mux = gpioBaseAddr + GPYMUX + pin32/16;
|
||||||
|
gmux = gpioBaseAddr + GPYGMUX + pin32/16;
|
||||||
|
csel = gpioBaseAddr + GPYCSEL + pin32/8;
|
||||||
|
|
||||||
|
//
|
||||||
|
//Now for the actual function
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
//To change the muxing, set the peripheral mux to 0/GPIO first to avoid
|
||||||
|
//glitches, then change the group mux, then set the peripheral mux to
|
||||||
|
//its target value. Finally, set the CPU select. This procedure is
|
||||||
|
//described in the TRM. Unfortunately, since we don't know the pin in
|
||||||
|
//advance we can't hardcode a bitfield reference, so there's some
|
||||||
|
//tricky bit twiddling here.
|
||||||
|
//
|
||||||
|
*mux &= ~(0x3UL << (2*pin16));
|
||||||
|
*gmux &= ~(0x3UL << (2*pin16));
|
||||||
|
*gmux |= (Uint32)((muxPosition >> 2) & 0x3UL) << (2*pin16);
|
||||||
|
*mux |= (Uint32)(muxPosition & 0x3UL) << (2*pin16);
|
||||||
|
|
||||||
|
*csel &= ~(0x3L << (4*pin8));
|
||||||
|
*csel |= (Uint32)(cpu & 0x3L) << (4*pin8);
|
||||||
|
|
||||||
|
//
|
||||||
|
//WARNING: This code does not touch the analog mode select registers,
|
||||||
|
//which are needed to give the USB module control of its IOs.
|
||||||
|
//
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO_SetupPinOptions - Setup up the GPIO input/output options for the
|
||||||
|
// specified pin.
|
||||||
|
//
|
||||||
|
//The flags are a 16-bit mask produced by ORing together options.
|
||||||
|
//For input pins, the valid flags are:
|
||||||
|
//GPIO_PULLUP Enable pull-up
|
||||||
|
//GPIO_INVERT Enable input polarity inversion
|
||||||
|
//GPIO_SYNC Synchronize the input latch to PLLSYSCLK
|
||||||
|
// (default -- you don't need to specify this)
|
||||||
|
//GPIO_QUAL3 Use 3-sample qualification
|
||||||
|
//GPIO_QUAL6 Use 6-sample qualification
|
||||||
|
//GPIO_ASYNC Do not use synchronization or qualification
|
||||||
|
//(Note: only one of SYNC, QUAL3, QUAL6, or ASYNC is allowed)
|
||||||
|
//
|
||||||
|
//For output pins, the valid flags are:
|
||||||
|
//GPIO_OPENDRAIN Output in open drain mode
|
||||||
|
//GPIO_PULLUP If open drain enabled, also enable the pull-up
|
||||||
|
//and the input qualification flags (SYNC/QUAL3/QUAL6/SYNC) listed above.
|
||||||
|
//
|
||||||
|
//With no flags, the default input state is synchronous with no
|
||||||
|
//pull-up or polarity inversion. The default output state is
|
||||||
|
//the standard digital output.
|
||||||
|
//
|
||||||
|
void GPIO_SetupPinOptions(Uint16 gpioNumber, Uint16 output, Uint16 flags)
|
||||||
|
{
|
||||||
|
volatile Uint32 *gpioBaseAddr;
|
||||||
|
volatile Uint32 *dir, *pud, *inv, *odr, *qsel;
|
||||||
|
Uint32 pin32, pin16, pinMask, qual;
|
||||||
|
|
||||||
|
pin32 = gpioNumber % 32;
|
||||||
|
pin16 = gpioNumber % 16;
|
||||||
|
pinMask = 1UL << pin32;
|
||||||
|
gpioBaseAddr = (Uint32 *)&GpioCtrlRegs + (gpioNumber/32)*GPY_CTRL_OFFSET;
|
||||||
|
|
||||||
|
//
|
||||||
|
//Create pointers to the appropriate registers. This is a workaround
|
||||||
|
//for the way GPIO registers are defined. The standard definition
|
||||||
|
//in the header file makes it very easy to do named accesses of one
|
||||||
|
//register or bit, but hard to do arbitrary numerical accesses. It's
|
||||||
|
//easier to have an array of GPIO modules with identical registers,
|
||||||
|
//including arrays for multi-register groups like GPyQSEL1-2. But
|
||||||
|
//the header file doesn't define anything we can turn into an array,
|
||||||
|
//so manual pointer arithmetic is used instead.
|
||||||
|
//
|
||||||
|
dir = gpioBaseAddr + GPYDIR;
|
||||||
|
pud = gpioBaseAddr + GPYPUD;
|
||||||
|
inv = gpioBaseAddr + GPYINV;
|
||||||
|
odr = gpioBaseAddr + GPYODR;
|
||||||
|
qsel = gpioBaseAddr + GPYQSEL + pin32/16;
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
//Set the data direction
|
||||||
|
//
|
||||||
|
*dir &= ~pinMask;
|
||||||
|
if (output == 1)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
//Output, with optional open drain mode and pull-up
|
||||||
|
//
|
||||||
|
*dir |= pinMask;
|
||||||
|
|
||||||
|
//
|
||||||
|
//Enable open drain if necessary
|
||||||
|
//
|
||||||
|
if (flags & GPIO_OPENDRAIN)
|
||||||
|
{
|
||||||
|
*odr |= pinMask;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
*odr &= ~pinMask;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
//Enable pull-up if necessary. Open drain mode must be active.
|
||||||
|
//
|
||||||
|
if (flags & (GPIO_OPENDRAIN | GPIO_PULLUP))
|
||||||
|
{
|
||||||
|
*pud &= ~pinMask;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
*pud |= pinMask;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
//Input, with optional pull-up, qualification, and polarity
|
||||||
|
//inversion
|
||||||
|
//
|
||||||
|
*dir &= ~pinMask;
|
||||||
|
|
||||||
|
//
|
||||||
|
//Enable pull-up if necessary
|
||||||
|
//
|
||||||
|
if (flags & GPIO_PULLUP)
|
||||||
|
{
|
||||||
|
*pud &= ~pinMask;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
*pud |= pinMask;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
//Invert polarity if necessary
|
||||||
|
//
|
||||||
|
if (flags & GPIO_INVERT)
|
||||||
|
{
|
||||||
|
*inv |= pinMask;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
*inv &= ~pinMask;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
//Extract the qualification parameter and load it into the register.
|
||||||
|
//This is also needed for open drain outputs, so we might as well do it
|
||||||
|
//all the time.
|
||||||
|
//
|
||||||
|
qual = (flags & GPIO_ASYNC) / GPIO_QUAL3;
|
||||||
|
*qsel &= ~(0x3L << (2 * pin16));
|
||||||
|
if (qual != 0x0)
|
||||||
|
{
|
||||||
|
*qsel |= qual << (2 * pin16);
|
||||||
|
}
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO_SetupLock - Enable or disable the GPIO register bit lock for the
|
||||||
|
// specified pin.
|
||||||
|
// The valid flags are:
|
||||||
|
// GPIO_UNLOCK - Unlock the pin setup register bits for
|
||||||
|
// the specified pin
|
||||||
|
// GPIO_LOCK - Lock the pin setup register bits for the
|
||||||
|
// specified pin
|
||||||
|
//
|
||||||
|
void GPIO_SetupLock(Uint16 gpioNumber, Uint16 flags)
|
||||||
|
{
|
||||||
|
volatile Uint32 *gpioBaseAddr;
|
||||||
|
volatile Uint32 *lock;
|
||||||
|
Uint32 pin32, pinMask;
|
||||||
|
|
||||||
|
pin32 = gpioNumber % 32;
|
||||||
|
pinMask = 1UL << pin32;
|
||||||
|
gpioBaseAddr = (Uint32 *)&GpioCtrlRegs + (gpioNumber/32)*GPY_CTRL_OFFSET;
|
||||||
|
|
||||||
|
//
|
||||||
|
//Create pointers to the appropriate registers. This is a workaround
|
||||||
|
//for the way GPIO registers are defined. The standard definition
|
||||||
|
//in the header file makes it very easy to do named accesses of one
|
||||||
|
//register or bit, but hard to do arbitrary numerical accesses. It's
|
||||||
|
//easier to have an array of GPIO modules with identical registers,
|
||||||
|
//including arrays for multi-register groups like GPyQSEL1-2. But
|
||||||
|
//the header file doesn't define anything we can turn into an array,
|
||||||
|
//so manual pointer arithmetic is used instead.
|
||||||
|
//
|
||||||
|
lock = gpioBaseAddr + GPYLOCK;
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
if(flags)
|
||||||
|
{
|
||||||
|
//Lock the pin
|
||||||
|
*lock |= pinMask;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//Unlock the pin
|
||||||
|
*lock &= ~pinMask;
|
||||||
|
}
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
//External interrupt setup
|
||||||
|
//
|
||||||
|
void GPIO_SetupXINT1Gpio(Uint16 gpioNumber)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
InputXbarRegs.INPUT4SELECT = gpioNumber; //Set XINT1 source to GPIO-pin
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
void GPIO_SetupXINT2Gpio(Uint16 gpioNumber)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
InputXbarRegs.INPUT5SELECT = gpioNumber; //Set XINT2 source to GPIO-pin
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
void GPIO_SetupXINT3Gpio(Uint16 gpioNumber)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
InputXbarRegs.INPUT6SELECT = gpioNumber; //Set XINT3 source to GPIO-pin
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
void GPIO_SetupXINT4Gpio(Uint16 gpioNumber)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
InputXbarRegs.INPUT13SELECT = gpioNumber; //Set XINT4 source to GPIO-pin
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
void GPIO_SetupXINT5Gpio(Uint16 gpioNumber)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
InputXbarRegs.INPUT14SELECT = gpioNumber; //Set XINT5 source to GPIO-pin
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
//GPIO_EnableUnbondedIOPullupsFor176Pin - Enable pullups for the unbonded
|
||||||
|
// GPIOs on the 176PTP package:
|
||||||
|
// GPIOs Grp Bits
|
||||||
|
// 95-132 C 31
|
||||||
|
// D 31:0
|
||||||
|
// E 4:0
|
||||||
|
// 134-168 E 31:6
|
||||||
|
// F 8:0
|
||||||
|
//
|
||||||
|
void GPIO_EnableUnbondedIOPullupsFor176Pin()
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
GpioCtrlRegs.GPCPUD.all = ~0x80000000; //GPIO 95
|
||||||
|
GpioCtrlRegs.GPDPUD.all = ~0xFFFFFFF7; //GPIOs 96-127
|
||||||
|
GpioCtrlRegs.GPEPUD.all = ~0xFFFFFFDF; //GPIOs 128-159 except for 133
|
||||||
|
GpioCtrlRegs.GPFPUD.all = ~0x000001FF; //GPIOs 160-168
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO_EnableUnbondedIOPullupsFor100Pin - Enable pullups for the unbonded
|
||||||
|
// GPIOs on the 100PZ package:
|
||||||
|
// GPIOs Grp Bits
|
||||||
|
// 0-1 A 1:0
|
||||||
|
// 5-9 A 9:5
|
||||||
|
// 22-40 A 31:22
|
||||||
|
// B 8:0
|
||||||
|
// 44-57 B 25:12
|
||||||
|
// 67-68 C 4:3
|
||||||
|
// 74-77 C 13:10
|
||||||
|
// 79-83 C 19:15
|
||||||
|
// 93-168 C 31:29
|
||||||
|
// D 31:0
|
||||||
|
// E 31:0
|
||||||
|
// F 8:0
|
||||||
|
//
|
||||||
|
void GPIO_EnableUnbondedIOPullupsFor100Pin()
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
GpioCtrlRegs.GPAPUD.all = ~0xFFC003E3; //GPIOs 0-1, 5-9, 22-31
|
||||||
|
GpioCtrlRegs.GPBPUD.all = ~0x03FFF1FF; //GPIOs 32-40, 44-57
|
||||||
|
GpioCtrlRegs.GPCPUD.all = ~0xE10FBC18; //GPIOs 67-68, 74-77, 79-83, 93-95
|
||||||
|
GpioCtrlRegs.GPDPUD.all = ~0xFFFFFFF7; //GPIOs 96-127
|
||||||
|
GpioCtrlRegs.GPEPUD.all = ~0xFFFFFFFF; //GPIOs 128-159
|
||||||
|
GpioCtrlRegs.GPFPUD.all = ~0x000001FF; //GPIOs 160-168
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO_EnableUnbondedIOPullups - InitSysCtrl would call this function
|
||||||
|
// this takes care of enabling IO pullups.
|
||||||
|
//
|
||||||
|
void GPIO_EnableUnbondedIOPullups()
|
||||||
|
{
|
||||||
|
//
|
||||||
|
//bits 8-10 have pin count
|
||||||
|
//
|
||||||
|
unsigned char pin_count = ((DevCfgRegs.PARTIDL.all & 0x00000700) >> 8) ;
|
||||||
|
|
||||||
|
//
|
||||||
|
//5 = 100 pin
|
||||||
|
//6 = 176 pin
|
||||||
|
//7 = 337 pin
|
||||||
|
//
|
||||||
|
if(pin_count == 5)
|
||||||
|
{
|
||||||
|
GPIO_EnableUnbondedIOPullupsFor100Pin();
|
||||||
|
}
|
||||||
|
else if (pin_count == 6)
|
||||||
|
{
|
||||||
|
GPIO_EnableUnbondedIOPullupsFor176Pin();
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//do nothing - this is 337 pin package
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif //CPU1
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO_ReadPin - Read the GPyDAT register bit for the specified pin. Note that
|
||||||
|
// this returns the actual state of the pin, not the state of
|
||||||
|
// the output latch.
|
||||||
|
//
|
||||||
|
Uint16 GPIO_ReadPin(Uint16 gpioNumber)
|
||||||
|
{
|
||||||
|
volatile Uint32 *gpioDataReg;
|
||||||
|
Uint16 pinVal;
|
||||||
|
|
||||||
|
gpioDataReg = (volatile Uint32 *)&GpioDataRegs + (gpioNumber/32)*GPY_DATA_OFFSET;
|
||||||
|
pinVal = (gpioDataReg[GPYDAT] >> (gpioNumber % 32)) & 0x1;
|
||||||
|
|
||||||
|
return pinVal;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO_WritePin - Set the GPyDAT register bit for the specified pin.
|
||||||
|
//
|
||||||
|
void GPIO_WritePin(Uint16 gpioNumber, Uint16 outVal)
|
||||||
|
{
|
||||||
|
volatile Uint32 *gpioDataReg;
|
||||||
|
Uint32 pinMask;
|
||||||
|
|
||||||
|
gpioDataReg = (volatile Uint32 *)&GpioDataRegs + (gpioNumber/32)*GPY_DATA_OFFSET;
|
||||||
|
pinMask = 1UL << (gpioNumber % 32);
|
||||||
|
|
||||||
|
if (outVal == 0)
|
||||||
|
{
|
||||||
|
gpioDataReg[GPYCLEAR] = pinMask;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
gpioDataReg[GPYSET] = pinMask;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// End of file
|
||||||
|
//
|
||||||
@ -0,0 +1,247 @@
|
|||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
PAGE 0: /* Program Memory */
|
||||||
|
PAGE 1: /* Data Memory */
|
||||||
|
ACCESSPROTECTION : origin = 0x0005F4C0, length = 0x00000040
|
||||||
|
ADCA : origin = 0x00007400, length = 0x00000080
|
||||||
|
ADCB : origin = 0x00007480, length = 0x00000080
|
||||||
|
ADCC : origin = 0x00007500, length = 0x00000080
|
||||||
|
ADCD : origin = 0x00007580, length = 0x00000080
|
||||||
|
ADCARESULT : origin = 0x00000B00, length = 0x00000018
|
||||||
|
ADCBRESULT : origin = 0x00000B20, length = 0x00000018
|
||||||
|
ADCCRESULT : origin = 0x00000B40, length = 0x00000018
|
||||||
|
ADCDRESULT : origin = 0x00000B60, length = 0x00000018
|
||||||
|
ANALOGSUBSYS : origin = 0x0005D180, length = 0x00000048
|
||||||
|
CANA : origin = 0x00048000, length = 0x00000200
|
||||||
|
CANB : origin = 0x0004A000, length = 0x00000200
|
||||||
|
CLA1 : origin = 0x00001400, length = 0x00000080
|
||||||
|
CLB1DATAEXCH : origin = 0x00003200, length = 0x00000200
|
||||||
|
CLB2DATAEXCH : origin = 0x00003600, length = 0x00000200
|
||||||
|
CLB3DATAEXCH : origin = 0x00003A00, length = 0x00000200
|
||||||
|
CLB4DATAEXCH : origin = 0x00003E00, length = 0x00000200
|
||||||
|
CLB1LOGICCFG : origin = 0x00003000, length = 0x00000052
|
||||||
|
CLB2LOGICCFG : origin = 0x00003400, length = 0x00000052
|
||||||
|
CLB3LOGICCFG : origin = 0x00003800, length = 0x00000052
|
||||||
|
CLB4LOGICCFG : origin = 0x00003C00, length = 0x00000052
|
||||||
|
CLB1LOGICCTRL : origin = 0x00003100, length = 0x00000040
|
||||||
|
CLB2LOGICCTRL : origin = 0x00003500, length = 0x00000040
|
||||||
|
CLB3LOGICCTRL : origin = 0x00003900, length = 0x00000040
|
||||||
|
CLB4LOGICCTRL : origin = 0x00003D00, length = 0x00000040
|
||||||
|
CLBXBAR : origin = 0x00007A40, length = 0x00000040
|
||||||
|
CLKCFG : origin = 0x0005D200, length = 0x00000032
|
||||||
|
CMPSS1 : origin = 0x00005C80, length = 0x00000020
|
||||||
|
CMPSS2 : origin = 0x00005CA0, length = 0x00000020
|
||||||
|
CMPSS3 : origin = 0x00005CC0, length = 0x00000020
|
||||||
|
CMPSS4 : origin = 0x00005CE0, length = 0x00000020
|
||||||
|
CMPSS5 : origin = 0x00005D00, length = 0x00000020
|
||||||
|
CMPSS6 : origin = 0x00005D20, length = 0x00000020
|
||||||
|
CMPSS7 : origin = 0x00005D40, length = 0x00000020
|
||||||
|
CMPSS8 : origin = 0x00005D60, length = 0x00000020
|
||||||
|
CPUTIMER0 : origin = 0x00000C00, length = 0x00000008
|
||||||
|
CPUTIMER1 : origin = 0x00000C08, length = 0x00000008
|
||||||
|
CPUTIMER2 : origin = 0x00000C10, length = 0x00000008
|
||||||
|
CPUSYS : origin = 0x0005D300, length = 0x00000082
|
||||||
|
DACA : origin = 0x00005C00, length = 0x00000008
|
||||||
|
DACB : origin = 0x00005C10, length = 0x00000008
|
||||||
|
DACC : origin = 0x00005C20, length = 0x00000008
|
||||||
|
DCSMCOMMON : origin = 0x0005F070, length = 0x00000008
|
||||||
|
DCSMZ1 : origin = 0x0005F000, length = 0x00000024
|
||||||
|
DCSMZ2 : origin = 0x0005F040, length = 0x00000024
|
||||||
|
DEVCFG : origin = 0x0005D000, length = 0x0000012E
|
||||||
|
DMACLASRCSEL : origin = 0x00007980, length = 0x0000001A
|
||||||
|
DMA : origin = 0x00001000, length = 0x00000200
|
||||||
|
ECAP1 : origin = 0x00005000, length = 0x00000020
|
||||||
|
ECAP2 : origin = 0x00005020, length = 0x00000020
|
||||||
|
ECAP3 : origin = 0x00005040, length = 0x00000020
|
||||||
|
ECAP4 : origin = 0x00005060, length = 0x00000020
|
||||||
|
ECAP5 : origin = 0x00005080, length = 0x00000020
|
||||||
|
ECAP6 : origin = 0x000050A0, length = 0x00000020
|
||||||
|
EMIF1CONFIG : origin = 0x0005F480, length = 0x00000020
|
||||||
|
EMIF2CONFIG : origin = 0x0005F4A0, length = 0x00000020
|
||||||
|
EMIF1 : origin = 0x00047000, length = 0x00000070
|
||||||
|
EMIF2 : origin = 0x00047800, length = 0x00000070
|
||||||
|
EPWM1 : origin = 0x00004000, length = 0x00000100
|
||||||
|
EPWM2 : origin = 0x00004100, length = 0x00000100
|
||||||
|
EPWM3 : origin = 0x00004200, length = 0x00000100
|
||||||
|
EPWM4 : origin = 0x00004300, length = 0x00000100
|
||||||
|
EPWM5 : origin = 0x00004400, length = 0x00000100
|
||||||
|
EPWM6 : origin = 0x00004500, length = 0x00000100
|
||||||
|
EPWM7 : origin = 0x00004600, length = 0x00000100
|
||||||
|
EPWM8 : origin = 0x00004700, length = 0x00000100
|
||||||
|
EPWM9 : origin = 0x00004800, length = 0x00000100
|
||||||
|
EPWM10 : origin = 0x00004900, length = 0x00000100
|
||||||
|
EPWM11 : origin = 0x00004A00, length = 0x00000100
|
||||||
|
EPWM12 : origin = 0x00004B00, length = 0x00000100
|
||||||
|
EPWMXBAR : origin = 0x00007A00, length = 0x00000040
|
||||||
|
EQEP1 : origin = 0x00005100, length = 0x00000022
|
||||||
|
EQEP2 : origin = 0x00005140, length = 0x00000022
|
||||||
|
EQEP3 : origin = 0x00005180, length = 0x00000022
|
||||||
|
FLASH0CTRL : origin = 0x0005F800, length = 0x00000182
|
||||||
|
FLASH0ECC : origin = 0x0005FB00, length = 0x00000028
|
||||||
|
FLASHPUMPSEMAPHORE : origin = 0x00050024, length = 0x00000002
|
||||||
|
GPIOCTRL : origin = 0x00007C00, length = 0x00000180
|
||||||
|
GPIODATA : origin = 0x00007F00, length = 0x00000030
|
||||||
|
I2CA : origin = 0x00007300, length = 0x00000022
|
||||||
|
I2CB : origin = 0x00007340, length = 0x00000022
|
||||||
|
INPUTXBAR : origin = 0x00007900, length = 0x00000020
|
||||||
|
IPC : origin = 0x00050000, length = 0x00000024
|
||||||
|
MEMORYERROR : origin = 0x0005F500, length = 0x00000040
|
||||||
|
MEMCFG : origin = 0x0005F400, length = 0x00000080
|
||||||
|
MCBSPA : origin = 0x00006000, length = 0x00000024
|
||||||
|
MCBSPB : origin = 0x00006040, length = 0x00000024
|
||||||
|
NMIINTRUPT : origin = 0x00007060, length = 0x00000007
|
||||||
|
OUTPUTXBAR : origin = 0x00007A80, length = 0x00000040
|
||||||
|
PIECTRL : origin = 0x00000CE0, length = 0x0000001A
|
||||||
|
PIEVECTTABLE : origin = 0x00000D00, length = 0x00000200
|
||||||
|
ROMPREFETCH : origin = 0x0005E608, length = 0x00000002
|
||||||
|
ROMWAITSTATE : origin = 0x0005F540, length = 0x00000002
|
||||||
|
SCIA : origin = 0x00007200, length = 0x00000010
|
||||||
|
SCIB : origin = 0x00007210, length = 0x00000010
|
||||||
|
SCIC : origin = 0x00007220, length = 0x00000010
|
||||||
|
SCID : origin = 0x00007230, length = 0x00000010
|
||||||
|
SDFM1 : origin = 0x00005E00, length = 0x00000080
|
||||||
|
SDFM2 : origin = 0x00005E80, length = 0x00000080
|
||||||
|
SPIA : origin = 0x00006100, length = 0x00000010
|
||||||
|
SPIB : origin = 0x00006110, length = 0x00000010
|
||||||
|
SPIC : origin = 0x00006120, length = 0x00000010
|
||||||
|
SYNCSOC : origin = 0x00007940, length = 0x00000006
|
||||||
|
UID : origin = 0x000703C0, length = 0x00000010
|
||||||
|
UPP : origin = 0x00006200, length = 0x00000048
|
||||||
|
WD : origin = 0x00007000, length = 0x0000002B
|
||||||
|
XBAR : origin = 0x00007920, length = 0x00000020
|
||||||
|
XINT : origin = 0x00007070, length = 0x0000000B
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
/*** PIE Vect Table and Boot ROM Variables Structures ***/
|
||||||
|
UNION run = PIEVECTTABLE
|
||||||
|
{
|
||||||
|
PieVectTableFile
|
||||||
|
GROUP
|
||||||
|
{
|
||||||
|
EmuKeyVar
|
||||||
|
EmuBModeVar
|
||||||
|
EmuBootPinsVar
|
||||||
|
FlashCallbackVar
|
||||||
|
FlashScalingVar
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
AccessProtectionRegsFile : > ACCESSPROTECTION, type=NOINIT
|
||||||
|
AdcaRegsFile : > ADCA, type=NOINIT
|
||||||
|
AdcbRegsFile : > ADCB, type=NOINIT
|
||||||
|
AdccRegsFile : > ADCC, type=NOINIT
|
||||||
|
AdcdRegsFile : > ADCD, type=NOINIT
|
||||||
|
AdcaResultRegsFile : > ADCARESULT, type=NOINIT
|
||||||
|
AdcbResultRegsFile : > ADCBRESULT, type=NOINIT
|
||||||
|
AdccResultRegsFile : > ADCCRESULT, type=NOINIT
|
||||||
|
AdcdResultRegsFile : > ADCDRESULT, type=NOINIT
|
||||||
|
AnalogSubsysRegsFile : > ANALOGSUBSYS, type=NOINIT
|
||||||
|
CanaRegsFile : > CANA, type=NOINIT
|
||||||
|
CanbRegsFile : > CANB, type=NOINIT
|
||||||
|
Cla1RegsFile : > CLA1, type=NOINIT
|
||||||
|
Clb1DataExchRegsFile : > CLB1DATAEXCH, type=NOINIT
|
||||||
|
Clb2DataExchRegsFile : > CLB2DATAEXCH, type=NOINIT
|
||||||
|
Clb3DataExchRegsFile : > CLB3DATAEXCH, type=NOINIT
|
||||||
|
Clb4DataExchRegsFile : > CLB4DATAEXCH, type=NOINIT
|
||||||
|
Clb1LogicCfgRegsFile : > CLB1LOGICCFG, type=NOINIT
|
||||||
|
Clb2LogicCfgRegsFile : > CLB2LOGICCFG, type=NOINIT
|
||||||
|
Clb3LogicCfgRegsFile : > CLB3LOGICCFG, type=NOINIT
|
||||||
|
Clb4LogicCfgRegsFile : > CLB4LOGICCFG, type=NOINIT
|
||||||
|
Clb1LogicCtrlRegsFile : > CLB1LOGICCTRL, type=NOINIT
|
||||||
|
Clb2LogicCtrlRegsFile : > CLB2LOGICCTRL, type=NOINIT
|
||||||
|
Clb3LogicCtrlRegsFile : > CLB3LOGICCTRL, type=NOINIT
|
||||||
|
Clb4LogicCtrlRegsFile : > CLB4LOGICCTRL, type=NOINIT
|
||||||
|
ClbXbarRegsFile : > CLBXBAR, type=NOINIT
|
||||||
|
ClkCfgRegsFile : > CLKCFG, type=NOINIT
|
||||||
|
Cmpss1RegsFile : > CMPSS1, type=NOINIT
|
||||||
|
Cmpss2RegsFile : > CMPSS2, type=NOINIT
|
||||||
|
Cmpss3RegsFile : > CMPSS3, type=NOINIT
|
||||||
|
Cmpss4RegsFile : > CMPSS4, type=NOINIT
|
||||||
|
Cmpss5RegsFile : > CMPSS5, type=NOINIT
|
||||||
|
Cmpss6RegsFile : > CMPSS6, type=NOINIT
|
||||||
|
Cmpss7RegsFile : > CMPSS7, type=NOINIT
|
||||||
|
Cmpss8RegsFile : > CMPSS8, type=NOINIT
|
||||||
|
CpuTimer0RegsFile : > CPUTIMER0, type=NOINIT
|
||||||
|
CpuTimer1RegsFile : > CPUTIMER1, type=NOINIT
|
||||||
|
CpuTimer2RegsFile : > CPUTIMER2, type=NOINIT
|
||||||
|
CpuSysRegsFile : > CPUSYS, type=NOINIT
|
||||||
|
DacaRegsFile : > DACA, type=NOINIT
|
||||||
|
DacbRegsFile : > DACB, type=NOINIT
|
||||||
|
DaccRegsFile : > DACC, type=NOINIT
|
||||||
|
DcsmCommonRegsFile : > DCSMCOMMON, type=NOINIT
|
||||||
|
DcsmZ1RegsFile : > DCSMZ1, type=NOINIT
|
||||||
|
DcsmZ2RegsFile : > DCSMZ2, type=NOINIT
|
||||||
|
DevCfgRegsFile : > DEVCFG, type=NOINIT
|
||||||
|
DmaClaSrcSelRegsFile : > DMACLASRCSEL, type=NOINIT
|
||||||
|
DmaRegsFile : > DMA, type=NOINIT
|
||||||
|
ECap1RegsFile : > ECAP1, type=NOINIT
|
||||||
|
ECap2RegsFile : > ECAP2, type=NOINIT
|
||||||
|
ECap3RegsFile : > ECAP3, type=NOINIT
|
||||||
|
ECap4RegsFile : > ECAP4, type=NOINIT
|
||||||
|
ECap5RegsFile : > ECAP5, type=NOINIT
|
||||||
|
ECap6RegsFile : > ECAP6, type=NOINIT
|
||||||
|
Emif1ConfigRegsFile : > EMIF1CONFIG, type=NOINIT
|
||||||
|
Emif2ConfigRegsFile : > EMIF2CONFIG, type=NOINIT
|
||||||
|
Emif1RegsFile : > EMIF1, type=NOINIT
|
||||||
|
Emif2RegsFile : > EMIF2, type=NOINIT
|
||||||
|
EPwm1RegsFile : > EPWM1, type=NOINIT
|
||||||
|
EPwm2RegsFile : > EPWM2, type=NOINIT
|
||||||
|
EPwm3RegsFile : > EPWM3, type=NOINIT
|
||||||
|
EPwm4RegsFile : > EPWM4, type=NOINIT
|
||||||
|
EPwm5RegsFile : > EPWM5, type=NOINIT
|
||||||
|
EPwm6RegsFile : > EPWM6, type=NOINIT
|
||||||
|
EPwm7RegsFile : > EPWM7, type=NOINIT
|
||||||
|
EPwm8RegsFile : > EPWM8, type=NOINIT
|
||||||
|
EPwm9RegsFile : > EPWM9, type=NOINIT
|
||||||
|
EPwm10RegsFile : > EPWM10, type=NOINIT
|
||||||
|
EPwm11RegsFile : > EPWM11, type=NOINIT
|
||||||
|
EPwm12RegsFile : > EPWM12, type=NOINIT
|
||||||
|
EPwmXbarRegsFile : > EPWMXBAR, type=NOINIT
|
||||||
|
EQep1RegsFile : > EQEP1, type=NOINIT
|
||||||
|
EQep2RegsFile : > EQEP2, type=NOINIT
|
||||||
|
EQep3RegsFile : > EQEP3, type=NOINIT
|
||||||
|
Flash0CtrlRegsFile : > FLASH0CTRL, type=NOINIT
|
||||||
|
Flash0EccRegsFile : > FLASH0ECC, type=NOINIT
|
||||||
|
FlashPumpSemaphoreRegsFile : > FLASHPUMPSEMAPHORE, type=NOINIT
|
||||||
|
GpioCtrlRegsFile : > GPIOCTRL, type=NOINIT
|
||||||
|
GpioDataRegsFile : > GPIODATA, type=NOINIT
|
||||||
|
I2caRegsFile : > I2CA, type=NOINIT
|
||||||
|
I2cbRegsFile : > I2CB, type=NOINIT
|
||||||
|
InputXbarRegsFile : > INPUTXBAR, type=NOINIT
|
||||||
|
IpcRegsFile : > IPC, type=NOINIT
|
||||||
|
MemoryErrorRegsFile : > MEMORYERROR, type=NOINIT
|
||||||
|
MemCfgRegsFile : > MEMCFG, type=NOINIT
|
||||||
|
McbspaRegsFile : > MCBSPA, type=NOINIT
|
||||||
|
McbspbRegsFile : > MCBSPB, type=NOINIT
|
||||||
|
NmiIntruptRegsFile : > NMIINTRUPT, type=NOINIT
|
||||||
|
OutputXbarRegsFile : > OUTPUTXBAR, type=NOINIT
|
||||||
|
PieCtrlRegsFile : > PIECTRL, type=NOINIT
|
||||||
|
RomPrefetchRegsFile : > ROMPREFETCH, type=NOINIT
|
||||||
|
RomWaitStateRegsFile : > ROMWAITSTATE, type=NOINIT
|
||||||
|
SciaRegsFile : > SCIA, type=NOINIT
|
||||||
|
ScibRegsFile : > SCIB, type=NOINIT
|
||||||
|
ScicRegsFile : > SCIC, type=NOINIT
|
||||||
|
ScidRegsFile : > SCID, type=NOINIT
|
||||||
|
Sdfm1RegsFile : > SDFM1, type=NOINIT
|
||||||
|
Sdfm2RegsFile : > SDFM2, type=NOINIT
|
||||||
|
SpiaRegsFile : > SPIA, type=NOINIT
|
||||||
|
SpibRegsFile : > SPIB, type=NOINIT
|
||||||
|
SpicRegsFile : > SPIC, type=NOINIT
|
||||||
|
SyncSocRegsFile : > SYNCSOC, type=NOINIT
|
||||||
|
UppRegsFile : > UPP, type=NOINIT
|
||||||
|
WdRegsFile : > WD, type=NOINIT
|
||||||
|
UidRegsFile : > UID, type=NOINIT
|
||||||
|
XbarRegsFile : > XBAR, type=NOINIT
|
||||||
|
XintRegsFile : > XINT, type=NOINIT
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
//===========================================================================
|
||||||
|
// End of file.
|
||||||
|
//===========================================================================
|
||||||
|
*/
|
||||||
|
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,109 @@
|
|||||||
|
;//###########################################################################
|
||||||
|
;//
|
||||||
|
;// FILE: F2837xD_usDelay.asm
|
||||||
|
;//
|
||||||
|
;// TITLE: Simple delay function
|
||||||
|
;//
|
||||||
|
;// DESCRIPTION:
|
||||||
|
;// This is a simple delay function that can be used to insert a specified
|
||||||
|
;// delay into code.
|
||||||
|
;// This function is only accurate if executed from internal zero-waitstate
|
||||||
|
;// SARAM. If it is executed from waitstate memory then the delay will be
|
||||||
|
;// longer then specified.
|
||||||
|
;// To use this function:
|
||||||
|
;// 1 - update the CPU clock speed in the F2837xD_Examples.h
|
||||||
|
;// file. For example:
|
||||||
|
;// #define CPU_RATE 6.667L // for a 150MHz CPU clock speed
|
||||||
|
;// 2 - Call this function by using the DELAY_US(A) macro
|
||||||
|
;// that is defined in the F2837xD_Device.h file. This macro
|
||||||
|
;// will convert the number of microseconds specified
|
||||||
|
;// into a loop count for use with this function.
|
||||||
|
;// This count will be based on the CPU frequency you specify.
|
||||||
|
;// 3 - For the most accurate delay
|
||||||
|
;// - Execute this function in 0 waitstate RAM.
|
||||||
|
;// - Disable interrupts before calling the function
|
||||||
|
;// If you do not disable interrupts, then think of
|
||||||
|
;// this as an "at least" delay function as the actual
|
||||||
|
;// delay may be longer.
|
||||||
|
;// The C assembly call from the DELAY_US(time) macro will
|
||||||
|
;// look as follows:
|
||||||
|
;// extern void Delay(long LoopCount);
|
||||||
|
;// MOV AL,#LowLoopCount
|
||||||
|
;// MOV AH,#HighLoopCount
|
||||||
|
;// LCR _Delay
|
||||||
|
;// Or as follows (if count is less then 16-bits):
|
||||||
|
;// MOV ACC,#LoopCount
|
||||||
|
;// LCR _Delay
|
||||||
|
;//
|
||||||
|
;//###########################################################################
|
||||||
|
;//
|
||||||
|
;// $Release Date: $
|
||||||
|
;// $Copyright:
|
||||||
|
;// Copyright (C) 2013-2026 Texas Instruments Incorporated - http://www.ti.com/
|
||||||
|
;//
|
||||||
|
;// Redistribution and use in source and binary forms, with or without
|
||||||
|
;// modification, are permitted provided that the following conditions
|
||||||
|
;// are met:
|
||||||
|
;//
|
||||||
|
;// Redistributions of source code must retain the above copyright
|
||||||
|
;// notice, this list of conditions and the following disclaimer.
|
||||||
|
;//
|
||||||
|
;// Redistributions in binary form must reproduce the above copyright
|
||||||
|
;// notice, this list of conditions and the following disclaimer in the
|
||||||
|
;// documentation and/or other materials provided with the
|
||||||
|
;// distribution.
|
||||||
|
;//
|
||||||
|
;// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
;// its contributors may be used to endorse or promote products derived
|
||||||
|
;// from this software without specific prior written permission.
|
||||||
|
;//
|
||||||
|
;// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
;// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
;// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
;// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
;// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
;// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
;// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
;// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
;// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
;// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
;// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
;// $
|
||||||
|
;//###########################################################################
|
||||||
|
|
||||||
|
.if __TI_EABI__
|
||||||
|
.asg F28x_usDelay, _F28x_usDelay
|
||||||
|
.endif
|
||||||
|
|
||||||
|
.def _F28x_usDelay
|
||||||
|
|
||||||
|
.cdecls LIST ;;Used to populate __TI_COMPILER_VERSION__ macro
|
||||||
|
%{
|
||||||
|
%}
|
||||||
|
|
||||||
|
.if __TI_COMPILER_VERSION__
|
||||||
|
.if __TI_COMPILER_VERSION__ >= 15009000
|
||||||
|
.sect ".TI.ramfunc" ;;Used with compiler v15.9.0 and newer
|
||||||
|
.else
|
||||||
|
.sect "ramfuncs" ;;Used with compilers older than v15.9.0
|
||||||
|
.endif
|
||||||
|
.endif
|
||||||
|
|
||||||
|
.global __F28x_usDelay
|
||||||
|
_F28x_usDelay:
|
||||||
|
SUB ACC,#1
|
||||||
|
BF _F28x_usDelay,GEQ ;; Loop if ACC >= 0
|
||||||
|
LRETR
|
||||||
|
|
||||||
|
;There is a 9/10 cycle overhead and each loop
|
||||||
|
;takes five cycles. The LoopCount is given by
|
||||||
|
;the following formula:
|
||||||
|
; DELAY_CPU_CYCLES = 9 + 5*LoopCount
|
||||||
|
; LoopCount = (DELAY_CPU_CYCLES - 9) / 5
|
||||||
|
; The macro DELAY_US(A) performs this calculation for you
|
||||||
|
;
|
||||||
|
;
|
||||||
|
|
||||||
|
;//
|
||||||
|
;// End of file
|
||||||
|
;//
|
||||||
@ -0,0 +1,112 @@
|
|||||||
|
;//###########################################################################
|
||||||
|
;//
|
||||||
|
;// FILE: F2837xD_CodeStartBranch.asm
|
||||||
|
;//
|
||||||
|
;// TITLE: Branch for redirecting code execution after boot.
|
||||||
|
;//
|
||||||
|
;// For these examples, code_start is the first code that is executed after
|
||||||
|
;// exiting the boot ROM code.
|
||||||
|
;//
|
||||||
|
;// The codestart section in the linker cmd file is used to physically place
|
||||||
|
;// this code at the correct memory location. This section should be placed
|
||||||
|
;// at the location the BOOT ROM will re-direct the code to. For example,
|
||||||
|
;// for boot to FLASH this code will be located at 0x3f7ff6.
|
||||||
|
;//
|
||||||
|
;// In addition, the example F2837xD projects are setup such that the codegen
|
||||||
|
;// entry point is also set to the code_start label. This is done by linker
|
||||||
|
;// option -e in the project build options. When the debugger loads the code,
|
||||||
|
;// it will automatically set the PC to the "entry point" address indicated by
|
||||||
|
;// the -e linker option. In this case the debugger is simply assigning the PC,
|
||||||
|
;// it is not the same as a full reset of the device.
|
||||||
|
;//
|
||||||
|
;// The compiler may warn that the entry point for the project is other then
|
||||||
|
;// _c_init00. _c_init00 is the C environment setup and is run before
|
||||||
|
;// main() is entered. The code_start code will re-direct the execution
|
||||||
|
;// to _c_init00 and thus there is no worry and this warning can be ignored.
|
||||||
|
;//
|
||||||
|
;//###########################################################################
|
||||||
|
;//
|
||||||
|
;// $Release Date: $
|
||||||
|
;// $Copyright:
|
||||||
|
;// Copyright (C) 2013-2026 Texas Instruments Incorporated - http://www.ti.com/
|
||||||
|
;//
|
||||||
|
;// Redistribution and use in source and binary forms, with or without
|
||||||
|
;// modification, are permitted provided that the following conditions
|
||||||
|
;// are met:
|
||||||
|
;//
|
||||||
|
;// Redistributions of source code must retain the above copyright
|
||||||
|
;// notice, this list of conditions and the following disclaimer.
|
||||||
|
;//
|
||||||
|
;// Redistributions in binary form must reproduce the above copyright
|
||||||
|
;// notice, this list of conditions and the following disclaimer in the
|
||||||
|
;// documentation and/or other materials provided with the
|
||||||
|
;// distribution.
|
||||||
|
;//
|
||||||
|
;// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
;// its contributors may be used to endorse or promote products derived
|
||||||
|
;// from this software without specific prior written permission.
|
||||||
|
;//
|
||||||
|
;// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
;// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
;// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
;// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
;// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
;// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
;// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
;// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
;// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
;// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
;// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
;// $
|
||||||
|
;//###########################################################################
|
||||||
|
|
||||||
|
***********************************************************************
|
||||||
|
|
||||||
|
WD_DISABLE .set 1 ;set to 1 to disable WD, else set to 0
|
||||||
|
|
||||||
|
.ref _c_int00
|
||||||
|
.global code_start
|
||||||
|
|
||||||
|
***********************************************************************
|
||||||
|
* Function: codestart section
|
||||||
|
*
|
||||||
|
* Description: Branch to code starting point
|
||||||
|
***********************************************************************
|
||||||
|
|
||||||
|
.sect "codestart"
|
||||||
|
.retain
|
||||||
|
|
||||||
|
code_start:
|
||||||
|
.if WD_DISABLE == 1
|
||||||
|
LB wd_disable ;Branch to watchdog disable code
|
||||||
|
.else
|
||||||
|
LB _c_int00 ;Branch to start of boot._asm in RTS library
|
||||||
|
.endif
|
||||||
|
|
||||||
|
;end codestart section
|
||||||
|
|
||||||
|
***********************************************************************
|
||||||
|
* Function: wd_disable
|
||||||
|
*
|
||||||
|
* Description: Disables the watchdog timer
|
||||||
|
***********************************************************************
|
||||||
|
.if WD_DISABLE == 1
|
||||||
|
|
||||||
|
.text
|
||||||
|
wd_disable:
|
||||||
|
SETC OBJMODE ;Set OBJMODE for 28x object code
|
||||||
|
EALLOW ;Enable EALLOW protected register access
|
||||||
|
MOVZ DP, #7029h>>6 ;Set data page for WDCR register
|
||||||
|
MOV @7029h, #0068h ;Set WDDIS bit in WDCR to disable WD
|
||||||
|
EDIS ;Disable EALLOW protected register access
|
||||||
|
LB _c_int00 ;Branch to start of boot._asm in RTS library
|
||||||
|
|
||||||
|
.endif
|
||||||
|
|
||||||
|
;end wd_disable
|
||||||
|
|
||||||
|
.end
|
||||||
|
|
||||||
|
;//
|
||||||
|
;// End of file.
|
||||||
|
;//
|
||||||
@ -0,0 +1,706 @@
|
|||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// FILE: device.c
|
||||||
|
//
|
||||||
|
// TITLE: Device setup for examples.
|
||||||
|
//
|
||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// $Release Date: $
|
||||||
|
// $Copyright:
|
||||||
|
// Copyright (C) 2013-2026 Texas Instruments Incorporated - http://www.ti.com/
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//#############################################################################
|
||||||
|
|
||||||
|
//
|
||||||
|
// Included Files
|
||||||
|
//
|
||||||
|
#include "device.h"
|
||||||
|
#include "driverlib.h"
|
||||||
|
#include "inc/hw_ipc.h"
|
||||||
|
|
||||||
|
#ifdef CMDTOOL
|
||||||
|
#include "device_cmd.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
using std::memcpy;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define PASS 0
|
||||||
|
#define FAIL 1
|
||||||
|
|
||||||
|
uint32_t Example_Result = FAIL;
|
||||||
|
uint32_t Example_PassCount = 0;
|
||||||
|
uint32_t Example_Fail = 0;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Function to initialize the device. Primarily initializes system control to a
|
||||||
|
// known state by disabling the watchdog, setting up the SYSCLKOUT frequency,
|
||||||
|
// and enabling the clocks to the peripherals.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void Device_init(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable the watchdog
|
||||||
|
//
|
||||||
|
SysCtl_disableWatchdog();
|
||||||
|
|
||||||
|
#ifdef CMDTOOL
|
||||||
|
CMD_init();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef _FLASH
|
||||||
|
#ifndef CMDTOOL
|
||||||
|
//
|
||||||
|
// Copy time critical code and flash setup code to RAM. This includes the
|
||||||
|
// following functions: InitFlash();
|
||||||
|
//
|
||||||
|
// The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
|
||||||
|
// are created by the linker. Refer to the device .cmd file.
|
||||||
|
//
|
||||||
|
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// Call Flash Initialization to setup flash waitstates. This function must
|
||||||
|
// reside in RAM.
|
||||||
|
//
|
||||||
|
Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES);
|
||||||
|
#endif
|
||||||
|
#ifdef CPU1
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure Analog Trim in case of untrimmed or TMX sample
|
||||||
|
//
|
||||||
|
if((SysCtl_getDeviceParametric(SYSCTL_DEVICE_QUAL) == 0x0U) &&
|
||||||
|
(HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_ANAREFTRIMA) == 0x0U))
|
||||||
|
{
|
||||||
|
Device_configureTMXAnalogTrim();
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set up PLL control and clock dividers
|
||||||
|
//
|
||||||
|
SysCtl_setClock(DEVICE_SETCLOCK_CFG);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Make sure the LSPCLK divider is set to the default (divide by 4)
|
||||||
|
//
|
||||||
|
SysCtl_setLowSpeedClock(SYSCTL_LSPCLK_PRESCALE_4);
|
||||||
|
|
||||||
|
//
|
||||||
|
// These asserts will check that the #defines for the clock rates in
|
||||||
|
// device.h match the actual rates that have been configured. If they do
|
||||||
|
// not match, check that the calculations of DEVICE_SYSCLK_FREQ and
|
||||||
|
// DEVICE_LSPCLK_FREQ are accurate. Some examples will not perform as
|
||||||
|
// expected if these are not correct.
|
||||||
|
//
|
||||||
|
ASSERT(SysCtl_getClock(DEVICE_OSCSRC_FREQ) == DEVICE_SYSCLK_FREQ);
|
||||||
|
ASSERT(SysCtl_getLowSpeedClock(DEVICE_OSCSRC_FREQ) == DEVICE_LSPCLK_FREQ);
|
||||||
|
|
||||||
|
#ifndef _FLASH
|
||||||
|
//
|
||||||
|
// Call Device_cal function when run using debugger
|
||||||
|
// This function is called as part of the Boot code. The function is called
|
||||||
|
// in the Device_init function since during debug time resets, the boot code
|
||||||
|
// will not be executed and the gel script will reinitialize all the
|
||||||
|
// registers and the calibrated values will be lost.
|
||||||
|
// Sysctl_deviceCal is a wrapper function for Device_Cal
|
||||||
|
//
|
||||||
|
SysCtl_deviceCal();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
//
|
||||||
|
// Turn on all peripherals
|
||||||
|
//
|
||||||
|
Device_enableAllPeripherals();
|
||||||
|
|
||||||
|
//
|
||||||
|
// Initialize result parameter as FAIL
|
||||||
|
//
|
||||||
|
Example_Result = FAIL;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Function to turn on all peripherals, enabling reads and writes to the
|
||||||
|
// peripherals' registers.
|
||||||
|
//
|
||||||
|
// Note that to reduce power, unused peripherals should be disabled.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void Device_enableAllPeripherals(void)
|
||||||
|
{
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLA1);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DMA);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER0);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER1);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER2);
|
||||||
|
#ifdef CPU1
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_HRPWM);
|
||||||
|
#endif
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EMIF1);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EMIF2);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM1);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM2);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM3);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM4);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM5);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM6);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM7);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM8);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM9);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM10);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM11);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM12);
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP1);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP2);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP3);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP4);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP5);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP6);
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP1);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP2);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP3);
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SD1);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SD2);
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIA);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIB);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIC);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCID);
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIA);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIB);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIC);
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CA);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CB);
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANA);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANB);
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MCBSPA);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MCBSPB);
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_USBA);
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_UPPA);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCB);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCC);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCD);
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS1);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS2);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS3);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS4);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS5);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS6);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS7);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS8);
|
||||||
|
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACA);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACB);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACC);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Function to disable pin locks on GPIOs.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void Device_initGPIO(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable pin locks.
|
||||||
|
//
|
||||||
|
GPIO_unlockPortConfig(GPIO_PORT_A, 0xFFFFFFFF);
|
||||||
|
GPIO_unlockPortConfig(GPIO_PORT_B, 0xFFFFFFFF);
|
||||||
|
GPIO_unlockPortConfig(GPIO_PORT_C, 0xFFFFFFFF);
|
||||||
|
GPIO_unlockPortConfig(GPIO_PORT_D, 0xFFFFFFFF);
|
||||||
|
GPIO_unlockPortConfig(GPIO_PORT_E, 0xFFFFFFFF);
|
||||||
|
GPIO_unlockPortConfig(GPIO_PORT_F, 0xFFFFFFFF);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable GPIO Pullups
|
||||||
|
//
|
||||||
|
Device_enableUnbondedGPIOPullups();
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Function to enable pullups for the unbonded GPIOs on the 176PTP package:
|
||||||
|
// GPIOs Grp Bits
|
||||||
|
// 95-132 C 31
|
||||||
|
// D 31:0
|
||||||
|
// E 4:0
|
||||||
|
// 134-168 E 31:6
|
||||||
|
// F 8:0
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
void Device_enableUnbondedGPIOPullupsFor176Pin(void)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
HWREG(GPIOCTRL_BASE + GPIO_O_GPCPUD) = ~0x80000000U;
|
||||||
|
HWREG(GPIOCTRL_BASE + GPIO_O_GPDPUD) = ~0xFFFFFFF7U;
|
||||||
|
HWREG(GPIOCTRL_BASE + GPIO_O_GPEPUD) = ~0xFFFFFFDFU;
|
||||||
|
HWREG(GPIOCTRL_BASE + GPIO_O_GPFPUD) = ~0x000001FFU;
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Function to enable pullups for the unbonded GPIOs on the 100PZ package:
|
||||||
|
// GPIOs Grp Bits
|
||||||
|
// 0-1 A 1:0
|
||||||
|
// 5-9 A 9:5
|
||||||
|
// 22-40 A 31:22
|
||||||
|
// B 8:0
|
||||||
|
// 44-57 B 25:12
|
||||||
|
// 67-68 C 4:3
|
||||||
|
// 74-77 C 13:10
|
||||||
|
// 79-83 C 19:15
|
||||||
|
// 93-168 C 31:29
|
||||||
|
// D 31:0
|
||||||
|
// E 31:0
|
||||||
|
// F 8:0
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void Device_enableUnbondedGPIOPullupsFor100Pin(void)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
HWREG(GPIOCTRL_BASE + GPIO_O_GPAPUD) = ~0xFFC003E3U;
|
||||||
|
HWREG(GPIOCTRL_BASE + GPIO_O_GPBPUD) = ~0x03FFF1FFU;
|
||||||
|
HWREG(GPIOCTRL_BASE + GPIO_O_GPCPUD) = ~0xE10FBC18U;
|
||||||
|
HWREG(GPIOCTRL_BASE + GPIO_O_GPDPUD) = ~0xFFFFFFF7U;
|
||||||
|
HWREG(GPIOCTRL_BASE + GPIO_O_GPEPUD) = ~0xFFFFFFFFU;
|
||||||
|
HWREG(GPIOCTRL_BASE + GPIO_O_GPFPUD) = ~0x000001FFU;
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Function to enable pullups for the unbonded GPIOs on the 100PZ or
|
||||||
|
// 176PTP package.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void Device_enableUnbondedGPIOPullups(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// bits 8-10 have pin count
|
||||||
|
//
|
||||||
|
uint16_t pinCount = ((HWREG(DEVCFG_BASE + SYSCTL_O_PARTIDL) &
|
||||||
|
(uint32_t)SYSCTL_PARTIDL_PIN_COUNT_M) >>
|
||||||
|
SYSCTL_PARTIDL_PIN_COUNT_S);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* 5 = 100 pin
|
||||||
|
* 6 = 176 pin
|
||||||
|
* 7 = 337 pin
|
||||||
|
*/
|
||||||
|
if(pinCount == 5)
|
||||||
|
{
|
||||||
|
Device_enableUnbondedGPIOPullupsFor100Pin();
|
||||||
|
}
|
||||||
|
else if(pinCount == 6)
|
||||||
|
{
|
||||||
|
Device_enableUnbondedGPIOPullupsFor176Pin();
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Do nothing - this is 337 pin package
|
||||||
|
//
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef CPU1
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Function to implement Analog trim of TMX devices
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void Device_configureTMXAnalogTrim(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Enable ADC clock
|
||||||
|
//
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCB);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCC);
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCD);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure ADC reference trim for TMX devices
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_ANAREFTRIMA) = 0x7BDDU;
|
||||||
|
HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_ANAREFTRIMB) = 0x7BDDU;
|
||||||
|
HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_ANAREFTRIMC) = 0x7BDDU;
|
||||||
|
HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_ANAREFTRIMD) = 0x7BDDU;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure ADC offset trim. The user should generate the trim values
|
||||||
|
// by following the instructions in the "ADC Zero Offset Calibration"
|
||||||
|
// section in device TRM. The below lines needs to be uncommented and
|
||||||
|
// updated with the correct trim values.
|
||||||
|
//
|
||||||
|
// HWREGH(ADCA_BASE + ADC_O_OFFTRIM) = 0x0U;
|
||||||
|
// HWREGH(ADCB_BASE + ADC_O_OFFTRIM) = 0x0U;
|
||||||
|
// HWREGH(ADCC_BASE + ADC_O_OFFTRIM) = 0x0U;
|
||||||
|
// HWREGH(ADCD_BASE + ADC_O_OFFTRIM) = 0x0U;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure internal oscillator trim. If the internal oscillator trim
|
||||||
|
// contains all zeros, the user can adjust the lowest 10 bits of the
|
||||||
|
// oscillator trim register between 1 (minimum) and 1023 (maximum)
|
||||||
|
// while observing the system clock on the XCLOCKOUT pin. The below
|
||||||
|
// lines needs to be uncommented and updated with the correct trim values.
|
||||||
|
//
|
||||||
|
// if(HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_INTOSC1TRIM) == 0x0U)
|
||||||
|
// {
|
||||||
|
// HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_INTOSC1TRIM) = 0x0U;
|
||||||
|
// }
|
||||||
|
// if( HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_INTOSC2TRIM) = 0x0U)
|
||||||
|
// {
|
||||||
|
// HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_INTOSC2TRIM) = 0x0U;
|
||||||
|
// }
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Disable ADC clock
|
||||||
|
//
|
||||||
|
SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
|
||||||
|
SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_ADCB);
|
||||||
|
SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_ADCC);
|
||||||
|
SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_ADCD);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//! Executes a CPU02 control system bootloader.
|
||||||
|
//!
|
||||||
|
//! \param bootMode specifies which CPU02 control system boot mode to execute.
|
||||||
|
//!
|
||||||
|
//! This function will allow the CPU01 master system to boot the CPU02 control
|
||||||
|
//! system via the following modes: Boot to RAM, Boot to Flash, Boot via SPI,
|
||||||
|
//! SCI, I2C, or parallel I/O. This function blocks and waits until the
|
||||||
|
//! control system boot ROM is configured and ready to receive CPU01 to CPU02
|
||||||
|
//! IPC INT0 interrupts. It then blocks and waits until IPC INT0 and
|
||||||
|
//! IPC FLAG31 are available in the CPU02 boot ROM prior to sending the
|
||||||
|
//! command to execute the selected bootloader.
|
||||||
|
//!
|
||||||
|
//! The \e bootMode parameter accepts one of the following values:
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_PARALLEL
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_SCI
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_SPI
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_I2C
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_CAN
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_RAM
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH
|
||||||
|
//!
|
||||||
|
//! \return 0 (success) if command is sent, or 1 (failure) if boot mode is
|
||||||
|
//! invalid and command was not sent.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
uint16_t
|
||||||
|
Device_bootCPU2(uint32_t bootMode)
|
||||||
|
{
|
||||||
|
uint32_t bootStatus;
|
||||||
|
uint16_t pin;
|
||||||
|
uint16_t returnStatus = STATUS_PASS;
|
||||||
|
|
||||||
|
//
|
||||||
|
// If CPU2 has already booted, return a fail to let the application
|
||||||
|
// know that something is out of the ordinary.
|
||||||
|
//
|
||||||
|
bootStatus = HWREG(IPC_BASE + IPC_O_BOOTSTS) & 0x0000000FU;
|
||||||
|
|
||||||
|
if(bootStatus == C2_BOOTROM_BOOTSTS_C2TOC1_BOOT_CMD_ACK)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check if MSB is set as well
|
||||||
|
//
|
||||||
|
bootStatus = ((uint32_t)(HWREG(IPC_BASE + IPC_O_BOOTSTS) &
|
||||||
|
0x80000000U)) >> 31U;
|
||||||
|
|
||||||
|
if(bootStatus != 0)
|
||||||
|
{
|
||||||
|
returnStatus = STATUS_FAIL;
|
||||||
|
|
||||||
|
return returnStatus;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Wait until CPU02 control system boot ROM is ready to receive
|
||||||
|
// CPU01 to CPU02 INT1 interrupts.
|
||||||
|
//
|
||||||
|
do
|
||||||
|
{
|
||||||
|
bootStatus = HWREG(IPC_BASE + IPC_O_BOOTSTS) &
|
||||||
|
C2_BOOTROM_BOOTSTS_SYSTEM_READY;
|
||||||
|
} while ((bootStatus != C2_BOOTROM_BOOTSTS_SYSTEM_READY));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Loop until CPU02 control system IPC flags 1 and 32 are available
|
||||||
|
//
|
||||||
|
while (((HWREG(IPC_BASE + IPC_O_FLG) & IPC_FLG_IPC0) != 0U) ||
|
||||||
|
((HWREG(IPC_BASE + IPC_O_FLG) & IPC_FLG_IPC31) != 0U))
|
||||||
|
{
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
if (bootMode >= C1C2_BROM_BOOTMODE_BOOT_COMMAND_MAX_SUPPORT_VALUE)
|
||||||
|
{
|
||||||
|
returnStatus = STATUS_FAIL;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Based on boot mode, enable pull-ups on peripheral pins and
|
||||||
|
// give GPIO pin control to CPU02 control system.
|
||||||
|
//
|
||||||
|
switch (bootMode)
|
||||||
|
{
|
||||||
|
case C1C2_BROM_BOOTMODE_BOOT_FROM_SCI:
|
||||||
|
|
||||||
|
//
|
||||||
|
//SCIA connected to CPU02
|
||||||
|
//
|
||||||
|
SysCtl_selectCPUForPeripheral(SYSCTL_CPUSEL5_SCI, 1,
|
||||||
|
SYSCTL_CPUSEL_CPU2);
|
||||||
|
|
||||||
|
//
|
||||||
|
//Allows CPU02 bootrom to take control of clock
|
||||||
|
//configuration registers
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
HWREG(CLKCFG_BASE + SYSCTL_O_CLKSEM) = 0xA5A50000U;
|
||||||
|
HWREG(CLKCFG_BASE + SYSCTL_O_LOSPCP) = 0x0002U;
|
||||||
|
EDIS;
|
||||||
|
|
||||||
|
GPIO_setDirectionMode(29, GPIO_DIR_MODE_OUT);
|
||||||
|
GPIO_setQualificationMode(29, GPIO_QUAL_ASYNC);
|
||||||
|
GPIO_setPinConfig(GPIO_29_SCITXDA);
|
||||||
|
GPIO_setMasterCore(29, GPIO_CORE_CPU2);
|
||||||
|
|
||||||
|
GPIO_setDirectionMode(28, GPIO_DIR_MODE_IN);
|
||||||
|
GPIO_setQualificationMode(28, GPIO_QUAL_ASYNC);
|
||||||
|
GPIO_setPinConfig(GPIO_28_SCIRXDA);
|
||||||
|
GPIO_setMasterCore(28, GPIO_CORE_CPU2);
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
case C1C2_BROM_BOOTMODE_BOOT_FROM_SPI:
|
||||||
|
|
||||||
|
//
|
||||||
|
//SPI-A connected to CPU02
|
||||||
|
//
|
||||||
|
SysCtl_selectCPUForPeripheral(SYSCTL_CPUSEL6_SPI, 1,
|
||||||
|
SYSCTL_CPUSEL_CPU2);
|
||||||
|
|
||||||
|
//
|
||||||
|
//Allows CPU02 bootrom to take control of clock configuration
|
||||||
|
// registers
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
HWREG(CLKCFG_BASE + SYSCTL_O_CLKSEM) = 0xA5A50000U;
|
||||||
|
EDIS;
|
||||||
|
|
||||||
|
GPIO_setDirectionMode(16, GPIO_DIR_MODE_IN);
|
||||||
|
GPIO_setQualificationMode(16, GPIO_QUAL_ASYNC);
|
||||||
|
GPIO_setPinConfig(GPIO_16_SPISIMOA);
|
||||||
|
GPIO_setMasterCore(16, GPIO_CORE_CPU2);
|
||||||
|
|
||||||
|
GPIO_setDirectionMode(17, GPIO_DIR_MODE_IN);
|
||||||
|
GPIO_setQualificationMode(17, GPIO_QUAL_ASYNC);
|
||||||
|
GPIO_setPinConfig(GPIO_17_SPISOMIA);
|
||||||
|
GPIO_setMasterCore(17, GPIO_CORE_CPU2);
|
||||||
|
|
||||||
|
GPIO_setDirectionMode(18, GPIO_DIR_MODE_IN);
|
||||||
|
GPIO_setQualificationMode(18, GPIO_QUAL_ASYNC);
|
||||||
|
GPIO_setPinConfig(GPIO_18_SPICLKA);
|
||||||
|
GPIO_setMasterCore(18, GPIO_CORE_CPU2);
|
||||||
|
|
||||||
|
GPIO_setDirectionMode(19, GPIO_DIR_MODE_OUT);
|
||||||
|
GPIO_setQualificationMode(19, GPIO_QUAL_ASYNC);
|
||||||
|
GPIO_setPinConfig(GPIO_19_GPIO19);
|
||||||
|
GPIO_setMasterCore(19, GPIO_CORE_CPU2);
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
case C1C2_BROM_BOOTMODE_BOOT_FROM_I2C:
|
||||||
|
|
||||||
|
//
|
||||||
|
//I2CA connected to CPU02
|
||||||
|
//
|
||||||
|
SysCtl_selectCPUForPeripheral(SYSCTL_CPUSEL7_I2C, 1,
|
||||||
|
SYSCTL_CPUSEL_CPU2);
|
||||||
|
|
||||||
|
//
|
||||||
|
//Allows CPU2 bootrom to take control of clock
|
||||||
|
//configuration registers
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
HWREG(CLKCFG_BASE + SYSCTL_O_CLKSEM) = 0xA5A50000U;
|
||||||
|
HWREG(CLKCFG_BASE + SYSCTL_O_LOSPCP) = 0x0002U;
|
||||||
|
EDIS;
|
||||||
|
|
||||||
|
GPIO_setDirectionMode(32, GPIO_DIR_MODE_IN);
|
||||||
|
GPIO_setQualificationMode(32, GPIO_QUAL_ASYNC);
|
||||||
|
GPIO_setPinConfig(GPIO_32_SDAA);
|
||||||
|
GPIO_setMasterCore(32, GPIO_CORE_CPU2);
|
||||||
|
|
||||||
|
GPIO_setDirectionMode(33, GPIO_DIR_MODE_IN);
|
||||||
|
GPIO_setQualificationMode(33, GPIO_QUAL_ASYNC);
|
||||||
|
GPIO_setPinConfig(GPIO_33_SCLA);
|
||||||
|
GPIO_setMasterCore(33, GPIO_CORE_CPU2);
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
case C1C2_BROM_BOOTMODE_BOOT_FROM_PARALLEL:
|
||||||
|
|
||||||
|
for(pin=58;pin<=65;pin++)
|
||||||
|
{
|
||||||
|
GPIO_setDirectionMode(pin, GPIO_DIR_MODE_IN);
|
||||||
|
GPIO_setQualificationMode(pin, GPIO_QUAL_ASYNC);
|
||||||
|
GPIO_setMasterCore(pin, GPIO_CORE_CPU2);
|
||||||
|
}
|
||||||
|
|
||||||
|
GPIO_setDirectionMode(69, GPIO_DIR_MODE_IN);
|
||||||
|
GPIO_setQualificationMode(69, GPIO_QUAL_ASYNC);
|
||||||
|
GPIO_setPinConfig(GPIO_69_GPIO69);
|
||||||
|
GPIO_setMasterCore(69, GPIO_CORE_CPU2);
|
||||||
|
|
||||||
|
GPIO_setDirectionMode(70, GPIO_DIR_MODE_IN);
|
||||||
|
GPIO_setQualificationMode(70, GPIO_QUAL_ASYNC);
|
||||||
|
GPIO_setPinConfig(GPIO_70_GPIO70);
|
||||||
|
GPIO_setMasterCore(70, GPIO_CORE_CPU2);
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
|
||||||
|
case C1C2_BROM_BOOTMODE_BOOT_FROM_CAN:
|
||||||
|
//
|
||||||
|
//Set up the GPIO mux to bring out CANATX on GPIO71
|
||||||
|
//and CANARX on GPIO70
|
||||||
|
//
|
||||||
|
GPIO_unlockPortConfig(GPIO_PORT_C, 0xFFFFFFFFU);
|
||||||
|
|
||||||
|
GPIO_setMasterCore(71, GPIO_CORE_CPU2);
|
||||||
|
GPIO_setPinConfig(GPIO_71_CANTXA);
|
||||||
|
GPIO_setQualificationMode(71, GPIO_QUAL_ASYNC);
|
||||||
|
|
||||||
|
GPIO_setMasterCore(70, GPIO_CORE_CPU2);
|
||||||
|
GPIO_setPinConfig(GPIO_70_CANRXA);
|
||||||
|
GPIO_setQualificationMode(70, GPIO_QUAL_ASYNC);
|
||||||
|
|
||||||
|
|
||||||
|
GPIO_lockPortConfig(GPIO_PORT_C, 0xFFFFFFFFU);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set CANA Bit-Clock Source Select = SYSCLK and enable CAN
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
HWREG(CLKCFG_BASE + SYSCTL_O_CLKSRCCTL2) &=
|
||||||
|
SYSCTL_CLKSRCCTL2_CANABCLKSEL_M;
|
||||||
|
EDIS;
|
||||||
|
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANA);
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
//CPU01 to CPU02 IPC Boot Mode Register
|
||||||
|
//
|
||||||
|
HWREG(IPC_BASE + IPC_O_BOOTMODE) = bootMode;
|
||||||
|
|
||||||
|
//
|
||||||
|
// CPU01 To CPU02 IPC Command Register
|
||||||
|
//
|
||||||
|
HWREG(IPC_BASE + IPC_O_SENDCOM) = BROM_IPC_EXECUTE_BOOTMODE_CMD;
|
||||||
|
|
||||||
|
//
|
||||||
|
// CPU01 to CPU02 IPC flag register
|
||||||
|
//
|
||||||
|
HWREG(IPC_BASE + IPC_O_SET) = 0x80000001U;
|
||||||
|
|
||||||
|
}
|
||||||
|
return returnStatus;
|
||||||
|
}
|
||||||
|
#endif // #ifdef CPU1
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Error handling function to be called when an ASSERT is violated
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void __error__(const char *filename, uint32_t line)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// An ASSERT condition was evaluated as false. You can use the filename and
|
||||||
|
// line parameters to determine what went wrong.
|
||||||
|
//
|
||||||
|
ESTOP0;
|
||||||
|
}
|
||||||
|
|
||||||
|
void Example_setResultPass(void)
|
||||||
|
{
|
||||||
|
Example_Result = PASS;
|
||||||
|
}
|
||||||
|
|
||||||
|
void Example_setResultFail(void)
|
||||||
|
{
|
||||||
|
Example_Result = FAIL;
|
||||||
|
}
|
||||||
|
|
||||||
|
void Example_done(void)
|
||||||
|
{
|
||||||
|
while(1);
|
||||||
|
}
|
||||||
@ -0,0 +1,394 @@
|
|||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// FILE: device.h
|
||||||
|
//
|
||||||
|
// TITLE: Device setup for examples.
|
||||||
|
//
|
||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// $Release Date: $
|
||||||
|
// $Copyright:
|
||||||
|
// Copyright (C) 2013-2026 Texas Instruments Incorporated - http://www.ti.com/
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//#############################################################################
|
||||||
|
|
||||||
|
//
|
||||||
|
// Included Files
|
||||||
|
//
|
||||||
|
#include "driverlib.h"
|
||||||
|
|
||||||
|
#if (!defined(CPU1) && !defined(CPU2))
|
||||||
|
#error "You must define CPU1 or CPU2 in your project properties. Otherwise, \
|
||||||
|
the offsets in your header files will be inaccurate."
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if (defined(CPU1) && defined(CPU2))
|
||||||
|
#error "You have defined both CPU1 and CPU2 in your project properties. Only \
|
||||||
|
a single CPU should be defined."
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Defines for pin numbers and other GPIO configuration
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// LEDs
|
||||||
|
//
|
||||||
|
#ifdef _LAUNCHXL_F28379D
|
||||||
|
#define DEVICE_GPIO_PIN_LED1 31U // GPIO number for LD10
|
||||||
|
#define DEVICE_GPIO_PIN_LED2 34U // GPIO number for LD9
|
||||||
|
#define DEVICE_GPIO_CFG_LED1 GPIO_31_GPIO31 // "pinConfig" for LD10
|
||||||
|
#define DEVICE_GPIO_CFG_LED2 GPIO_34_GPIO34 // "pinConfig" for LD9
|
||||||
|
#else
|
||||||
|
#define DEVICE_GPIO_PIN_LED1 31U // GPIO number for LD2
|
||||||
|
#define DEVICE_GPIO_PIN_LED2 34U // GPIO number for LD3
|
||||||
|
#define DEVICE_GPIO_CFG_LED1 GPIO_31_GPIO31 // "pinConfig" for LD2
|
||||||
|
#define DEVICE_GPIO_CFG_LED2 GPIO_34_GPIO34 // "pinConfig" for LD3
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
//
|
||||||
|
// SCI for USB-to-UART adapter on FTDI chip
|
||||||
|
//
|
||||||
|
#ifdef _LAUNCHXL_F28379D
|
||||||
|
#define DEVICE_GPIO_PIN_SCIRXDA 43U // GPIO number for SCI RX
|
||||||
|
#define DEVICE_GPIO_PIN_SCITXDA 42U // GPIO number for SCI TX
|
||||||
|
#define DEVICE_GPIO_CFG_SCIRXDA GPIO_43_SCIRXDA // "pinConfig" for SCI RX
|
||||||
|
#define DEVICE_GPIO_CFG_SCITXDA GPIO_42_SCITXDA // "pinConfig" for SCI TX
|
||||||
|
#else
|
||||||
|
#define DEVICE_GPIO_PIN_SCIRXDA 28U // GPIO number for SCI RX
|
||||||
|
#define DEVICE_GPIO_PIN_SCITXDA 29U // GPIO number for SCI TX
|
||||||
|
#define DEVICE_GPIO_CFG_SCIRXDA GPIO_28_SCIRXDA // "pinConfig" for SCI RX
|
||||||
|
#define DEVICE_GPIO_CFG_SCITXDA GPIO_29_SCITXDA // "pinConfig" for SCI TX
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// GPIO assignment for CAN-A and CAN-B
|
||||||
|
//
|
||||||
|
#ifdef _LAUNCHXL_F28379D
|
||||||
|
#define DEVICE_GPIO_CFG_CANRXA GPIO_36_CANRXA // "pinConfig" for CANA RX
|
||||||
|
#define DEVICE_GPIO_CFG_CANTXA GPIO_37_CANTXA // "pinConfig" for CANA TX
|
||||||
|
#define DEVICE_GPIO_CFG_CANRXB GPIO_17_CANRXB // "pinConfig" for CANB RX
|
||||||
|
#define DEVICE_GPIO_CFG_CANTXB GPIO_12_CANTXB // "pinConfig" for CANB TX
|
||||||
|
#else
|
||||||
|
#define DEVICE_GPIO_CFG_CANRXA GPIO_30_CANRXA // "pinConfig" for CANA RX
|
||||||
|
#define DEVICE_GPIO_CFG_CANTXA GPIO_31_CANTXA // "pinConfig" for CANA TX
|
||||||
|
#define DEVICE_GPIO_CFG_CANRXB GPIO_10_CANRXB // "pinConfig" for CANB RX
|
||||||
|
#define DEVICE_GPIO_CFG_CANTXB GPIO_8_CANTXB // "pinConfig" for CANB TX
|
||||||
|
|
||||||
|
//I2CA GPIO pins
|
||||||
|
#define DEVICE_GPIO_PIN_SDAA 104
|
||||||
|
#define DEVICE_GPIO_PIN_SCLA 105
|
||||||
|
|
||||||
|
#define DEVICE_GPIO_CFG_SDAA GPIO_104_SDAA
|
||||||
|
#define DEVICE_GPIO_CFG_SCLA GPIO_105_SCLA
|
||||||
|
|
||||||
|
|
||||||
|
//I2CB GPIO pins
|
||||||
|
#define DEVICE_GPIO_PIN_SDAB 40
|
||||||
|
#define DEVICE_GPIO_PIN_SCLB 41
|
||||||
|
|
||||||
|
#define DEVICE_GPIO_CFG_SDAB GPIO_40_SDAB
|
||||||
|
#define DEVICE_GPIO_CFG_SCLB GPIO_41_SCLB
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Defines related to clock configuration
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Launchpad Configuration
|
||||||
|
//
|
||||||
|
#ifdef _LAUNCHXL_F28379D
|
||||||
|
|
||||||
|
//
|
||||||
|
// 10MHz XTAL on LaunchPad. For use with SysCtl_getClock().
|
||||||
|
//
|
||||||
|
#define DEVICE_OSCSRC_FREQ 10000000U
|
||||||
|
|
||||||
|
//
|
||||||
|
// Define to pass to SysCtl_setClock(). Will configure the clock as follows:
|
||||||
|
// PLLSYSCLK = 10MHz (XTAL_OSC) * 40 (IMULT) * 1 (FMULT) / 2 (PLLCLK_BY_2)
|
||||||
|
//
|
||||||
|
#define DEVICE_SETCLOCK_CFG (SYSCTL_OSCSRC_XTAL | SYSCTL_IMULT(40) | \
|
||||||
|
SYSCTL_FMULT_NONE | SYSCTL_SYSDIV(2) | \
|
||||||
|
SYSCTL_PLL_ENABLE)
|
||||||
|
|
||||||
|
//
|
||||||
|
// 200MHz SYSCLK frequency based on the above DEVICE_SETCLOCK_CFG. Update the
|
||||||
|
// code below if a different clock configuration is used!
|
||||||
|
//
|
||||||
|
#define DEVICE_SYSCLK_FREQ ((DEVICE_OSCSRC_FREQ * 40 * 1) / 2)
|
||||||
|
|
||||||
|
//
|
||||||
|
// ControlCARD Configuration
|
||||||
|
//
|
||||||
|
#else
|
||||||
|
|
||||||
|
//
|
||||||
|
// 20MHz XTAL on controlCARD. For use with SysCtl_getClock().
|
||||||
|
//
|
||||||
|
#define DEVICE_OSCSRC_FREQ 20000000U
|
||||||
|
|
||||||
|
//
|
||||||
|
// Define to pass to SysCtl_setClock(). Will configure the clock as follows:
|
||||||
|
// PLLSYSCLK = 20MHz (XTAL_OSC) * 20 (IMULT) * 1 (FMULT) / 2 (PLLCLK_BY_2)
|
||||||
|
//
|
||||||
|
#define DEVICE_SETCLOCK_CFG (SYSCTL_OSCSRC_XTAL | SYSCTL_IMULT(20) | \
|
||||||
|
SYSCTL_FMULT_NONE | SYSCTL_SYSDIV(2) | \
|
||||||
|
SYSCTL_PLL_ENABLE)
|
||||||
|
|
||||||
|
//
|
||||||
|
// 200MHz SYSCLK frequency based on the above DEVICE_SETCLOCK_CFG. Update the
|
||||||
|
// code below if a different clock configuration is used!
|
||||||
|
//
|
||||||
|
#define DEVICE_SYSCLK_FREQ ((DEVICE_OSCSRC_FREQ * 20 * 1) / 2)
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// 50MHz LSPCLK frequency based on the above DEVICE_SYSCLK_FREQ and a default
|
||||||
|
// low speed peripheral clock divider of 4. Update the code below if a
|
||||||
|
// different LSPCLK divider is used!
|
||||||
|
//
|
||||||
|
#define DEVICE_LSPCLK_FREQ (DEVICE_SYSCLK_FREQ / 4)
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Macro to call SysCtl_delay() to achieve a delay in microseconds. The macro
|
||||||
|
// will convert the desired delay in microseconds to the count value expected
|
||||||
|
// by the function. \b x is the number of microseconds to delay.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define DEVICE_DELAY_US(x) SysCtl_delay(((((long double)(x)) / (1000000.0L / \
|
||||||
|
(long double)DEVICE_SYSCLK_FREQ)) - 9.0L) / 5.0L)
|
||||||
|
|
||||||
|
//
|
||||||
|
// The macros that can be used as parameter to the function Device_bootCPU2
|
||||||
|
//
|
||||||
|
#define C1C2_BROM_BOOTMODE_BOOT_FROM_PARALLEL 0x00000000U
|
||||||
|
#define C1C2_BROM_BOOTMODE_BOOT_FROM_SCI 0x00000001U
|
||||||
|
#define C1C2_BROM_BOOTMODE_BOOT_FROM_SPI 0x00000004U
|
||||||
|
#define C1C2_BROM_BOOTMODE_BOOT_FROM_I2C 0x00000005U
|
||||||
|
#define C1C2_BROM_BOOTMODE_BOOT_FROM_CAN 0x00000007U
|
||||||
|
#define C1C2_BROM_BOOTMODE_BOOT_FROM_RAM 0x0000000AU
|
||||||
|
#define C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH 0x0000000BU
|
||||||
|
|
||||||
|
//
|
||||||
|
// Other macros that are needed for the Device_bootCPU2 function
|
||||||
|
//
|
||||||
|
#define BROM_IPC_EXECUTE_BOOTMODE_CMD 0x00000013U
|
||||||
|
#define C1C2_BROM_BOOTMODE_BOOT_COMMAND_MAX_SUPPORT_VALUE 0x0000000CU
|
||||||
|
#define C2_BOOTROM_BOOTSTS_C2TOC1_IGNORE 0x00000000U
|
||||||
|
#define C2_BOOTROM_BOOTSTS_SYSTEM_START_BOOT 0x00000001U
|
||||||
|
#define C2_BOOTROM_BOOTSTS_SYSTEM_READY 0x00000002U
|
||||||
|
#define C2_BOOTROM_BOOTSTS_C2TOC1_BOOT_CMD_ACK 0x00000003U
|
||||||
|
#define C2_BOOTROM_BOOTSTS_C2TOC1_BOOT_CMD_NAK_STATUS_NOT_SUPPORTED 0x00000004U
|
||||||
|
#define C2_BOOTROM_BOOTSTS_C2TOC1_BOOT_CMD_NAK_STATUS_BUSY_WITH_BOOT 0x00000005U
|
||||||
|
|
||||||
|
//
|
||||||
|
// Macros used as return value by the Device_bootCPU2 function
|
||||||
|
//
|
||||||
|
#define STATUS_FAIL 0x0001
|
||||||
|
#define STATUS_PASS 0x0000
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Defines, Globals, and Header Includes related to Flash Support
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef _FLASH
|
||||||
|
#include <stddef.h>
|
||||||
|
|
||||||
|
extern uint16_t RamfuncsLoadStart;
|
||||||
|
extern uint16_t RamfuncsLoadEnd;
|
||||||
|
extern uint16_t RamfuncsLoadSize;
|
||||||
|
extern uint16_t RamfuncsRunStart;
|
||||||
|
extern uint16_t RamfuncsRunEnd;
|
||||||
|
extern uint16_t RamfuncsRunSize;
|
||||||
|
|
||||||
|
#define DEVICE_FLASH_WAITSTATES 3
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
extern uint32_t Example_PassCount;
|
||||||
|
extern uint32_t Example_Fail;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Function Prototypes
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \addtogroup device_api
|
||||||
|
//! @{
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! @brief Function to initialize the device. Primarily initializes system control to a
|
||||||
|
//! known state by disabling the watchdog, setting up the SYSCLKOUT frequency,
|
||||||
|
//! and enabling the clocks to the peripherals.
|
||||||
|
//!
|
||||||
|
//! \param None.
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void Device_init(void);
|
||||||
|
//*****************************************************************************
|
||||||
|
//!
|
||||||
|
//!
|
||||||
|
//! @brief Function to turn on all peripherals, enabling reads and writes to the
|
||||||
|
//! peripherals' registers.
|
||||||
|
//!
|
||||||
|
//! Note that to reduce power, unused peripherals should be disabled.
|
||||||
|
//!
|
||||||
|
//! @param None
|
||||||
|
//! @return None
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void Device_enableAllPeripherals(void);
|
||||||
|
//*****************************************************************************
|
||||||
|
//!
|
||||||
|
//!
|
||||||
|
//! @brief Function to disable pin locks on GPIOs.
|
||||||
|
//!
|
||||||
|
//! @param None
|
||||||
|
//! @return None
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void Device_initGPIO(void);
|
||||||
|
//*****************************************************************************
|
||||||
|
//!
|
||||||
|
//! @brief Function to enable pullups for the unbonded GPIOs on the 176PTP package:
|
||||||
|
//! GPIOs Grp Bits
|
||||||
|
//! 95-132 C 31
|
||||||
|
//! D 31:0
|
||||||
|
//! E 4:0
|
||||||
|
//! 134-168 E 31:6
|
||||||
|
//! F 8:0
|
||||||
|
//!
|
||||||
|
//! @param None
|
||||||
|
//! @return None
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void Device_enableUnbondedGPIOPullupsFor176Pin(void);
|
||||||
|
//*****************************************************************************
|
||||||
|
//!
|
||||||
|
//! @brief Function to enable pullups for the unbonded GPIOs on the 100PZ package:
|
||||||
|
//! GPIOs Grp Bits
|
||||||
|
//! 0-1 A 1:0
|
||||||
|
//! 5-9 A 9:5
|
||||||
|
//! 22-40 A 31:22
|
||||||
|
//! B 8:0
|
||||||
|
//! 44-57 B 25:12
|
||||||
|
//! 67-68 C 4:3
|
||||||
|
//! 74-77 C 13:10
|
||||||
|
//! 79-83 C 19:15
|
||||||
|
//! 93-168 C 31:29
|
||||||
|
//! D 31:0
|
||||||
|
//! E 31:0
|
||||||
|
//! F 8:0
|
||||||
|
//! @param None
|
||||||
|
//! @return None
|
||||||
|
//
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void Device_enableUnbondedGPIOPullupsFor100Pin(void);
|
||||||
|
//*****************************************************************************
|
||||||
|
//!
|
||||||
|
//! @brief Function to enable pullups for the unbonded GPIOs on the
|
||||||
|
//! 176PTP package.
|
||||||
|
//!
|
||||||
|
//! @param None
|
||||||
|
//! @return None
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void Device_enableUnbondedGPIOPullups(void);
|
||||||
|
#ifdef CPU1
|
||||||
|
//*****************************************************************************
|
||||||
|
//!
|
||||||
|
//! @brief Function to implement Analog trim of TMX devices
|
||||||
|
//!
|
||||||
|
//! @param None
|
||||||
|
//! @return None
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void Device_configureTMXAnalogTrim(void);
|
||||||
|
//*****************************************************************************
|
||||||
|
//! @brief Executes a CPU02 control system bootloader.
|
||||||
|
//!
|
||||||
|
//! \param bootMode specifies which CPU02 control system boot mode to execute.
|
||||||
|
//!
|
||||||
|
//! This function will allow the CPU01 master system to boot the CPU02 control
|
||||||
|
//! system via the following modes: Boot to RAM, Boot to Flash, Boot via SPI,
|
||||||
|
//! SCI, I2C, or parallel I/O. This function blocks and waits until the
|
||||||
|
//! control system boot ROM is configured and ready to receive CPU01 to CPU02
|
||||||
|
//! IPC INT0 interrupts. It then blocks and waits until IPC INT0 and
|
||||||
|
//! IPC FLAG31 are available in the CPU02 boot ROM prior to sending the
|
||||||
|
//! command to execute the selected bootloader.
|
||||||
|
//!
|
||||||
|
//! The \e bootMode parameter accepts one of the following values:
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_PARALLEL
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_SCI
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_SPI
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_I2C
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_CAN
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_RAM
|
||||||
|
//! - \b C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH
|
||||||
|
//!
|
||||||
|
//! \return 0 (success) if command is sent, or 1 (failure) if boot mode is
|
||||||
|
//! invalid and command was not sent.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern uint16_t Device_bootCPU2(uint32_t ulBootMode);
|
||||||
|
#endif
|
||||||
|
//*****************************************************************************
|
||||||
|
//!
|
||||||
|
//! @brief Error handling function to be called when an ASSERT is violated
|
||||||
|
//!
|
||||||
|
//! @param *filename File name in which the error has occurred
|
||||||
|
//! @param line Line number within the file
|
||||||
|
//! @return None
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void __error__(const char *filename, uint32_t line);
|
||||||
|
extern void Example_setResultPass(void);
|
||||||
|
extern void Example_setResultFail(void);
|
||||||
|
extern void Example_done(void);
|
||||||
|
|
||||||
|
//
|
||||||
|
// End of file
|
||||||
|
//
|
||||||
@ -0,0 +1,87 @@
|
|||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// FILE: driverlib.h
|
||||||
|
//
|
||||||
|
// TITLE: C28x Driverlib Header File
|
||||||
|
//
|
||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// $Release Date: $
|
||||||
|
// $Copyright:
|
||||||
|
// Copyright (C) 2013-2026 Texas Instruments Incorporated - http://www.ti.com/
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//#############################################################################
|
||||||
|
#ifndef DRIVERLIB_H
|
||||||
|
#define DRIVERLIB_H
|
||||||
|
|
||||||
|
#include "inc/hw_memmap.h"
|
||||||
|
|
||||||
|
#include "adc.h"
|
||||||
|
#include "asysctl.h"
|
||||||
|
#include "can.h"
|
||||||
|
#include "cla.h"
|
||||||
|
#include "clb.h"
|
||||||
|
#include "cmpss.h"
|
||||||
|
#include "cpu.h"
|
||||||
|
#include "cputimer.h"
|
||||||
|
#include "dac.h"
|
||||||
|
#include "dcsm.h"
|
||||||
|
#include "debug.h"
|
||||||
|
#include "dma.h"
|
||||||
|
#include "ecap.h"
|
||||||
|
#include "emif.h"
|
||||||
|
#include "epwm.h"
|
||||||
|
#include "eqep.h"
|
||||||
|
#include "flash.h"
|
||||||
|
#include "gpio.h"
|
||||||
|
#include "hrpwm.h"
|
||||||
|
#include "i2c.h"
|
||||||
|
#include "interrupt.h"
|
||||||
|
#include "ipc.h"
|
||||||
|
#include "mcbsp.h"
|
||||||
|
#include "memcfg.h"
|
||||||
|
#include "pin_map.h"
|
||||||
|
#include "pin_map_legacy.h"
|
||||||
|
#include "sci.h"
|
||||||
|
#include "sdfm.h"
|
||||||
|
#include "spi.h"
|
||||||
|
#include "sysctl.h"
|
||||||
|
#include "upp.h"
|
||||||
|
#include "version.h"
|
||||||
|
#include "xbar.h"
|
||||||
|
|
||||||
|
#include "driver_inclusive_terminology_mapping.h"
|
||||||
|
|
||||||
|
#endif // end of DRIVERLIB_H definition
|
||||||
|
|
||||||
|
//
|
||||||
|
// End of file
|
||||||
|
//
|
||||||
@ -0,0 +1,342 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: adc.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x ADC driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "adc.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Defines for locations of ADC calibration functions in OTP for use in
|
||||||
|
// ADC_setMode() ONLY. Not intended for use by application code.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following functions calibrate the ADC linearity. Use them in the
|
||||||
|
// ADC_setMode() function only.
|
||||||
|
//
|
||||||
|
#define ADC_calADCAINL 0x0703B4U
|
||||||
|
#define ADC_calADCBINL 0x0703B2U
|
||||||
|
#define ADC_calADCCINL 0x0703B0U
|
||||||
|
#define ADC_calADCDINL 0x0703AEU
|
||||||
|
|
||||||
|
//
|
||||||
|
// This function looks up the ADC offset trim for a given condition. Use this
|
||||||
|
// in the ADC_setMode() function only.
|
||||||
|
//
|
||||||
|
#define ADC_getOffsetTrim 0x0703ACU
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// ADC_setMode
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
ADC_setMode(uint32_t base, ADC_Resolution resolution,
|
||||||
|
ADC_SignalMode signalMode)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(ADC_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check for correct signal mode & resolution. In this device:
|
||||||
|
// Single ended signal conversions are supported in 12-bit mode only
|
||||||
|
// Differential signal conversions are supported in 16-bit mode only
|
||||||
|
//
|
||||||
|
if(signalMode == ADC_MODE_SINGLE_ENDED)
|
||||||
|
{
|
||||||
|
ASSERT(resolution == ADC_RESOLUTION_12BIT);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
ASSERT(resolution == ADC_RESOLUTION_16BIT);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
//
|
||||||
|
// Apply the resolution and signalMode to the specified ADC.
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
HWREGH(base + ADC_O_CTL2) = (HWREGH(base + ADC_O_CTL2) &
|
||||||
|
~(ADC_CTL2_RESOLUTION | ADC_CTL2_SIGNALMODE)) |
|
||||||
|
((uint16_t)resolution | (uint16_t)signalMode);
|
||||||
|
EDIS;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Apply INL and offset trims
|
||||||
|
//
|
||||||
|
ADC_setINLTrim(base);
|
||||||
|
ADC_setOffsetTrim(base);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// ADC_setINLTrim
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
ADC_setINLTrim(uint32_t base)
|
||||||
|
{
|
||||||
|
ADC_Resolution resolution;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(ADC_isBaseValid(base));
|
||||||
|
|
||||||
|
resolution = (ADC_Resolution)
|
||||||
|
(HWREGH(base + ADC_O_CTL2) & ADC_CTL2_RESOLUTION);
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
switch(base)
|
||||||
|
{
|
||||||
|
case ADCA_BASE:
|
||||||
|
if(HWREGH(ADC_calADCAINL) != 0xFFFFU)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Trim function is programmed into OTP, so call it
|
||||||
|
//
|
||||||
|
(*((void (*)(void))ADC_calADCAINL))();
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Do nothing, no INL trim function populated
|
||||||
|
//
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case ADCB_BASE:
|
||||||
|
if(HWREGH(ADC_calADCBINL) != 0xFFFFU)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Trim function is programmed into OTP, so call it
|
||||||
|
//
|
||||||
|
(*((void (*)(void))ADC_calADCBINL))();
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Do nothing, no INL trim function populated
|
||||||
|
//
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case ADCC_BASE:
|
||||||
|
if(HWREGH(ADC_calADCCINL) != 0xFFFFU)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Trim function is programmed into OTP, so call it
|
||||||
|
//
|
||||||
|
(*((void (*)(void))ADC_calADCCINL))();
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Do nothing, no INL trim function populated
|
||||||
|
//
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case ADCD_BASE:
|
||||||
|
if(HWREGH(ADC_calADCDINL) != 0xFFFFU)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Trim function is programmed into OTP, so call it
|
||||||
|
//
|
||||||
|
(*((void (*)(void))ADC_calADCDINL))();
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Do nothing, no INL trim function populated
|
||||||
|
//
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
//
|
||||||
|
// Invalid base address! Do nothing!
|
||||||
|
//
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Apply linearity trim workaround for 12-bit resolution
|
||||||
|
//
|
||||||
|
if(resolution == ADC_RESOLUTION_12BIT)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// 12-bit linearity trim workaround
|
||||||
|
//
|
||||||
|
HWREG(base + ADC_O_INLTRIM1) &= 0xFFFF0000U;
|
||||||
|
HWREG(base + ADC_O_INLTRIM2) &= 0xFFFF0000U;
|
||||||
|
HWREG(base + ADC_O_INLTRIM4) &= 0xFFFF0000U;
|
||||||
|
HWREG(base + ADC_O_INLTRIM5) &= 0xFFFF0000U;
|
||||||
|
}
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// ADC_setOffsetTrim
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
ADC_setOffsetTrim(uint32_t base)
|
||||||
|
{
|
||||||
|
uint16_t offsetIndex = 0U;
|
||||||
|
uint16_t offsetTrim = 0U;
|
||||||
|
ADC_Resolution resolution;
|
||||||
|
ADC_SignalMode signalMode;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(ADC_isBaseValid(base));
|
||||||
|
|
||||||
|
resolution = (ADC_Resolution)
|
||||||
|
(HWREGH(base + ADC_O_CTL2) & ADC_CTL2_RESOLUTION);
|
||||||
|
signalMode = (ADC_SignalMode)
|
||||||
|
(HWREGH(base + ADC_O_CTL2) & ADC_CTL2_SIGNALMODE);
|
||||||
|
|
||||||
|
switch(base)
|
||||||
|
{
|
||||||
|
case ADCA_BASE:
|
||||||
|
offsetIndex = (uint16_t)(0U * 4U);
|
||||||
|
break;
|
||||||
|
case ADCB_BASE:
|
||||||
|
offsetIndex = (uint16_t)(1U * 4U);
|
||||||
|
break;
|
||||||
|
case ADCC_BASE:
|
||||||
|
offsetIndex = (uint16_t)(2U * 4U);
|
||||||
|
break;
|
||||||
|
case ADCD_BASE:
|
||||||
|
offsetIndex = (uint16_t)(3U * 4U);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
//
|
||||||
|
// Invalid base address!
|
||||||
|
//
|
||||||
|
offsetIndex = 0U;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Offset trim function is programmed into OTP, so call it
|
||||||
|
//
|
||||||
|
if(HWREGH(ADC_getOffsetTrim) != 0xFFFFU)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Calculate the index into OTP table of offset trims and call
|
||||||
|
// function to return the correct offset trim
|
||||||
|
//
|
||||||
|
offsetIndex += ((signalMode == ADC_MODE_DIFFERENTIAL) ? 1U : 0U) +
|
||||||
|
(2U * ((resolution == ADC_RESOLUTION_16BIT) ? 1U : 0U));
|
||||||
|
|
||||||
|
offsetTrim =
|
||||||
|
(*((uint16_t (*)(uint16_t index))ADC_getOffsetTrim))(offsetIndex);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Offset trim function is not populated, so set offset trim to 0
|
||||||
|
//
|
||||||
|
offsetTrim = 0U;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Apply the offset trim. Offset Trim is not updated here in case of TMX or
|
||||||
|
// untrimmed devices. The default trims for TMX devices should be handled in
|
||||||
|
// Device_init(). Refer to Device_init() and Device_configureTMXAnalogTrim()
|
||||||
|
// APIs for more details.
|
||||||
|
//
|
||||||
|
if(offsetTrim > 0x0U)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
HWREGH(base + ADC_O_OFFTRIM) = offsetTrim;
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// ADC_setPPBTripLimits
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
ADC_setPPBTripLimits(uint32_t base, ADC_PPBNumber ppbNumber,
|
||||||
|
int32_t tripHiLimit, int32_t tripLoLimit)
|
||||||
|
{
|
||||||
|
uint32_t ppbHiOffset;
|
||||||
|
uint32_t ppbLoOffset;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(ADC_isBaseValid(base));
|
||||||
|
ASSERT((tripHiLimit <= 65535) && (tripHiLimit >= -65536));
|
||||||
|
ASSERT((tripLoLimit <= 65535) && (tripLoLimit >= -65536));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get the offset to the appropriate trip limit registers.
|
||||||
|
//
|
||||||
|
ppbHiOffset = (ADC_PPBxTRIPHI_STEP * (uint32_t)ppbNumber) +
|
||||||
|
ADC_O_PPB1TRIPHI;
|
||||||
|
ppbLoOffset = (ADC_PPBxTRIPLO_STEP * (uint32_t)ppbNumber) +
|
||||||
|
ADC_O_PPB1TRIPLO;
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the trip high limit.
|
||||||
|
//
|
||||||
|
HWREG(base + ppbHiOffset) =
|
||||||
|
(HWREG(base + ppbHiOffset) & ~ADC_PPBTRIP_MASK) |
|
||||||
|
((uint32_t)tripHiLimit & ADC_PPBTRIP_MASK);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the trip low limit.
|
||||||
|
//
|
||||||
|
HWREG(base + ppbLoOffset) =
|
||||||
|
(HWREG(base + ppbLoOffset) & ~ADC_PPBTRIP_MASK) |
|
||||||
|
((uint32_t)tripLoLimit & ADC_PPBTRIP_MASK);
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,43 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: asysctl.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x Driver for Analog System Control.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "asysctl.h"
|
||||||
@ -0,0 +1,160 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: asysctl.h
|
||||||
|
//
|
||||||
|
// TITLE: C28x driver for Analog System Control.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#ifndef ASYSCTL_H
|
||||||
|
#define ASYSCTL_H
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \addtogroup asysctl_api ASysCtl
|
||||||
|
//! @{
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
#include "inc/hw_asysctl.h"
|
||||||
|
#include "inc/hw_memmap.h"
|
||||||
|
#include "inc/hw_types.h"
|
||||||
|
#include "debug.h"
|
||||||
|
#include "cpu.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Prototypes for the APIs.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Enable temperature sensor.
|
||||||
|
//!
|
||||||
|
//! This function enables the temperature sensor output to the ADC.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
ASysCtl_enableTemperatureSensor(void)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the temperature sensor enable bit.
|
||||||
|
//
|
||||||
|
HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_TSNSCTL) |= ASYSCTL_TSNSCTL_ENABLE;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Disable temperature sensor.
|
||||||
|
//!
|
||||||
|
//! This function disables the temperature sensor output to the ADC.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
ASysCtl_disableTemperatureSensor(void)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear the temperature sensor enable bit.
|
||||||
|
//
|
||||||
|
HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_TSNSCTL) &= ~(ASYSCTL_TSNSCTL_ENABLE);
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Locks the temperature sensor control register.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void ASysCtl_lockTemperatureSensor(void)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write a 1 to the lock bit in the LOCK register.
|
||||||
|
//
|
||||||
|
HWREGH(ANALOGSUBSYS_BASE + ASYSCTL_O_LOCK) |= ASYSCTL_LOCK_TSNSCTL;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Close the Doxygen group.
|
||||||
|
//! @}
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // ASYSCTL_H
|
||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
@ -0,0 +1,46 @@
|
|||||||
|
<projectSpec>
|
||||||
|
<project
|
||||||
|
name="f2837xd_driverlib"
|
||||||
|
device="Generic C28xx Device"
|
||||||
|
cgtVersion="22.6.3.LTS"
|
||||||
|
products="C2000WARE"
|
||||||
|
launchWizard="False"
|
||||||
|
outputType="staticLibrary"
|
||||||
|
location="."
|
||||||
|
>
|
||||||
|
<configuration name="Debug" compilerBuildOptions="--opt_level=off -I../ -v28 -ml -mt --float_support=fpu32 --define=DEBUG -g --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --gen_data_subsections=on --abi=coffabi" archiverBuildOptions="driverlib_coff.lib" outputFormat="COFF" postBuildStep="if exist driverlib_eabi.lib ${C2000_CG_ROOT}/bin/libinfo2000.exe -o driverlib.lib driverlib_eabi.lib driverlib_coff.lib"/>
|
||||||
|
<configuration name="Debug_EABI" compilerBuildOptions="--opt_level=off -I../ -v28 -ml -mt --float_support=fpu32 --define=DEBUG -g --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --gen_data_subsections=on --abi=eabi" archiverBuildOptions="../Debug/driverlib_eabi.lib" outputFormat="ELF" postBuildStep="if exist ../Debug/driverlib_coff.lib ${C2000_CG_ROOT}/bin/libinfo2000.exe -o ../Debug/driverlib.lib ../Debug/driverlib_eabi.lib ../Debug/driverlib_coff.lib"/>
|
||||||
|
<configuration name="Release" compilerBuildOptions="-O2 -I../ -v28 -ml -mt --float_support=fpu32 -g --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --gen_data_subsections=on --abi=coffabi" archiverBuildOptions="driverlib_coff.lib" outputFormat="COFF" postBuildStep="if exist driverlib_eabi.lib ${C2000_CG_ROOT}/bin/libinfo2000.exe -o driverlib.lib driverlib_eabi.lib driverlib_coff.lib" />
|
||||||
|
<configuration name="Release_EABI" compilerBuildOptions="-O2 -I../ -v28 -ml -mt --float_support=fpu32 -g --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --gen_data_subsections=on --abi=eabi" archiverBuildOptions="../Release/driverlib_eabi.lib" outputFormat="ELF" postBuildStep="if exist ../Release/driverlib_coff.lib ${C2000_CG_ROOT}/bin/libinfo2000.exe -o ../Release/driverlib.lib ../Release/driverlib_eabi.lib ../Release/driverlib_coff.lib" />
|
||||||
|
<file action="link" path="../adc.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../asysctl.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../can.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../cla.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../clb.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../cmpss.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../cputimer.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../dac.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../dcsm.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../dma.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../ecap.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../emif.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../epwm.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../eqep.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../flash.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../gpio.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../hrpwm.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../i2c.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../ipc.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../interrupt.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../mcbsp.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../memcfg.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../sci.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../sdfm.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../spi.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../sysctl.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../upp.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../usb.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../version.c" targetDirectory="." />
|
||||||
|
<file action="link" path="../xbar.c" targetDirectory="." />
|
||||||
|
</project>
|
||||||
|
</projectSpec>
|
||||||
@ -0,0 +1,89 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: cla.c
|
||||||
|
//
|
||||||
|
// TITLE: CLA Driver Implementation File
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "cla.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// CLA_setTriggerSource()
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
CLA_setTriggerSource(CLA_TaskNumber taskNumber, CLA_Trigger trigger)
|
||||||
|
{
|
||||||
|
uint32_t srcSelReg;
|
||||||
|
uint32_t shiftVal;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Calculate the shift value for the specified task.
|
||||||
|
//
|
||||||
|
shiftVal = ((uint32_t)taskNumber * SYSCTL_CLA1TASKSRCSEL1_TASK2_S) % 32U;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Calculate the register address for the specified task.
|
||||||
|
//
|
||||||
|
if(taskNumber <= CLA_TASK_4)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Tasks 1-4
|
||||||
|
//
|
||||||
|
srcSelReg = (uint32_t)DMACLASRCSEL_BASE + SYSCTL_O_CLA1TASKSRCSEL1;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Tasks 5-8
|
||||||
|
//
|
||||||
|
srcSelReg = (uint32_t)DMACLASRCSEL_BASE + SYSCTL_O_CLA1TASKSRCSEL2;
|
||||||
|
}
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write trigger selection to the appropriate register.
|
||||||
|
//
|
||||||
|
HWREG(srcSelReg) &= ~((uint32_t)SYSCTL_CLA1TASKSRCSEL1_TASK1_M
|
||||||
|
<< shiftVal);
|
||||||
|
HWREG(srcSelReg) = HWREG(srcSelReg) | ((uint32_t)trigger << shiftVal);
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
@ -0,0 +1,984 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: cla.h
|
||||||
|
//
|
||||||
|
// TITLE: CLA Driver Implementation File
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#ifndef CLA_H
|
||||||
|
#define CLA_H
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \addtogroup cla_api CLA
|
||||||
|
//! \brief This module is used for configurating CLA.
|
||||||
|
//! @{
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
#include "cpu.h"
|
||||||
|
#include "debug.h"
|
||||||
|
#include "inc/hw_cla.h"
|
||||||
|
#include "inc/hw_memmap.h"
|
||||||
|
#include "inc/hw_sysctl.h"
|
||||||
|
#include "inc/hw_types.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Useful defines used within the driver functions. Not intended for use by
|
||||||
|
// application code.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CLA_NUM_EOT_INTERRUPTS (8U)
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values that can be passed to CLA_clearTaskFlags(), CLA_forceTasks(),
|
||||||
|
// and CLA_enableTasks(), CLA_disableTasks(), and CLA_enableSoftwareInterrupt()
|
||||||
|
// as the taskFlags parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CLA_TASKFLAG_1 (0x01U) //!< CLA Task 1 Flag
|
||||||
|
#define CLA_TASKFLAG_2 (0x02U) //!< CLA Task 2 Flag
|
||||||
|
#define CLA_TASKFLAG_3 (0x04U) //!< CLA Task 3 Flag
|
||||||
|
#define CLA_TASKFLAG_4 (0x08U) //!< CLA Task 4 Flag
|
||||||
|
#define CLA_TASKFLAG_5 (0x10U) //!< CLA Task 5 Flag
|
||||||
|
#define CLA_TASKFLAG_6 (0x20U) //!< CLA Task 6 Flag
|
||||||
|
#define CLA_TASKFLAG_7 (0x40U) //!< CLA Task 7 Flag
|
||||||
|
#define CLA_TASKFLAG_8 (0x80U) //!< CLA Task 8 Flag
|
||||||
|
#define CLA_TASKFLAG_ALL (0xFFU) //!< CLA All Task Flag
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Values that can be passed to CLA_getPendingTaskFlag(),
|
||||||
|
//! CLA_getTaskOverflowFlag(), CLA_getTaskRunStatus(), CLA_setTriggerSource(),
|
||||||
|
//! CLA_registerEndOfTaskInterrupt(), and CLA_unregisterEndOfTaskInterrupt()
|
||||||
|
//! as the taskNumber parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
CLA_TASK_1, //!< CLA Task 1
|
||||||
|
CLA_TASK_2, //!< CLA Task 2
|
||||||
|
CLA_TASK_3, //!< CLA Task 3
|
||||||
|
CLA_TASK_4, //!< CLA Task 4
|
||||||
|
CLA_TASK_5, //!< CLA Task 5
|
||||||
|
CLA_TASK_6, //!< CLA Task 6
|
||||||
|
CLA_TASK_7, //!< CLA Task 7
|
||||||
|
CLA_TASK_8 //!< CLA Task 8
|
||||||
|
} CLA_TaskNumber;
|
||||||
|
|
||||||
|
#ifdef __TMS320C28XX__ // These enums are only accessible by C28x
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Values that can be passed to CLA_mapTaskVector() as the \e claIntVect
|
||||||
|
//! parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
CLA_MVECT_1 = CLA_O_MVECT1, //!< Task Interrupt Vector 1
|
||||||
|
CLA_MVECT_2 = CLA_O_MVECT2, //!< Task Interrupt Vector 2
|
||||||
|
CLA_MVECT_3 = CLA_O_MVECT3, //!< Task Interrupt Vector 3
|
||||||
|
CLA_MVECT_4 = CLA_O_MVECT4, //!< Task Interrupt Vector 4
|
||||||
|
CLA_MVECT_5 = CLA_O_MVECT5, //!< Task Interrupt Vector 5
|
||||||
|
CLA_MVECT_6 = CLA_O_MVECT6, //!< Task Interrupt Vector 6
|
||||||
|
CLA_MVECT_7 = CLA_O_MVECT7, //!< Task Interrupt Vector 7
|
||||||
|
CLA_MVECT_8 = CLA_O_MVECT8 //!< Task Interrupt Vector 8
|
||||||
|
} CLA_MVECTNumber;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Values that can be passed to CLA_setTriggerSource() as the \e trigger
|
||||||
|
//! parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
CLA_TRIGGER_SOFTWARE = 0U, //!< CLA Task Trigger Source is Software
|
||||||
|
|
||||||
|
CLA_TRIGGER_ADCA1 = 1U, //!< CLA Task Trigger Source is ADCA1
|
||||||
|
CLA_TRIGGER_ADCA2 = 2U, //!< CLA Task Trigger Source is ADCA2
|
||||||
|
CLA_TRIGGER_ADCA3 = 3U, //!< CLA Task Trigger Source is ADCA3
|
||||||
|
CLA_TRIGGER_ADCA4 = 4U, //!< CLA Task Trigger Source is ADCA4
|
||||||
|
CLA_TRIGGER_ADCAEVT = 5U, //!< CLA Task Trigger Source is ADCAEVT
|
||||||
|
CLA_TRIGGER_ADCB1 = 6U, //!< CLA Task Trigger Source is ADCB1
|
||||||
|
CLA_TRIGGER_ADCB2 = 7U, //!< CLA Task Trigger Source is ADCB2
|
||||||
|
CLA_TRIGGER_ADCB3 = 8U, //!< CLA Task Trigger Source is ADCB3
|
||||||
|
CLA_TRIGGER_ADCB4 = 9U, //!< CLA Task Trigger Source is ADCB4
|
||||||
|
CLA_TRIGGER_ADCBEVT = 10U, //!< CLA Task Trigger Source is ADCBEVT
|
||||||
|
CLA_TRIGGER_ADCC1 = 11U, //!< CLA Task Trigger Source is ADCC1
|
||||||
|
CLA_TRIGGER_ADCC2 = 12U, //!< CLA Task Trigger Source is ADCC2
|
||||||
|
CLA_TRIGGER_ADCC3 = 13U, //!< CLA Task Trigger Source is ADCC3
|
||||||
|
CLA_TRIGGER_ADCC4 = 14U, //!< CLA Task Trigger Source is ADCC4
|
||||||
|
CLA_TRIGGER_ADCCEVT = 15U, //!< CLA Task Trigger Source is ADCCEVT
|
||||||
|
CLA_TRIGGER_ADCD1 = 16U, //!< CLA Task Trigger Source is ADCD1
|
||||||
|
CLA_TRIGGER_ADCD2 = 17U, //!< CLA Task Trigger Source is ADCD2
|
||||||
|
CLA_TRIGGER_ADCD3 = 18U, //!< CLA Task Trigger Source is ADCD3
|
||||||
|
CLA_TRIGGER_ADCD4 = 19U, //!< CLA Task Trigger Source is ADCD4
|
||||||
|
CLA_TRIGGER_ADCDEVT = 20U, //!< CLA Task Trigger Source is ADCDEVT
|
||||||
|
|
||||||
|
CLA_TRIGGER_XINT1 = 29U, //!< CLA Task Trigger Source is XINT1
|
||||||
|
CLA_TRIGGER_XINT2 = 30U, //!< CLA Task Trigger Source is XINT2
|
||||||
|
CLA_TRIGGER_XINT3 = 31U, //!< CLA Task Trigger Source is XINT3
|
||||||
|
CLA_TRIGGER_XINT4 = 32U, //!< CLA Task Trigger Source is XINT4
|
||||||
|
CLA_TRIGGER_XINT5 = 33U, //!< CLA Task Trigger Source is XINT5
|
||||||
|
|
||||||
|
CLA_TRIGGER_EPWM1INT = 36U, //!< CLA Task Trigger Source is EPWM1INT
|
||||||
|
CLA_TRIGGER_EPWM2INT = 37U, //!< CLA Task Trigger Source is EPWM2INT
|
||||||
|
CLA_TRIGGER_EPWM3INT = 38U, //!< CLA Task Trigger Source is EPWM3INT
|
||||||
|
CLA_TRIGGER_EPWM4INT = 39U, //!< CLA Task Trigger Source is EPWM4INT
|
||||||
|
CLA_TRIGGER_EPWM5INT = 40U, //!< CLA Task Trigger Source is EPWM5INT
|
||||||
|
CLA_TRIGGER_EPWM6INT = 41U, //!< CLA Task Trigger Source is EPWM6INT
|
||||||
|
CLA_TRIGGER_EPWM7INT = 42U, //!< CLA Task Trigger Source is EPWM7INT
|
||||||
|
CLA_TRIGGER_EPWM8INT = 43U, //!< CLA Task Trigger Source is EPWM8INT
|
||||||
|
CLA_TRIGGER_EPWM9INT = 44U, //!< CLA Task Trigger Source is EPWM9INT
|
||||||
|
CLA_TRIGGER_EPWM10INT = 45U, //!< CLA Task Trigger Source is EPWM10INT
|
||||||
|
CLA_TRIGGER_EPWM11INT = 46U, //!< CLA Task Trigger Source is EPWM11INT
|
||||||
|
CLA_TRIGGER_EPWM12INT = 47U, //!< CLA Task Trigger Source is EPWM12INT
|
||||||
|
|
||||||
|
|
||||||
|
CLA_TRIGGER_TINT0 = 68U, //!< CLA Task Trigger Source is TINT0
|
||||||
|
CLA_TRIGGER_TINT1 = 69U, //!< CLA Task Trigger Source is TINT1
|
||||||
|
CLA_TRIGGER_TINT2 = 70U, //!< CLA Task Trigger Source is TINT2
|
||||||
|
|
||||||
|
CLA_TRIGGER_MXINTA = 71U, //!< CLA Task Trigger Source is MXINTA
|
||||||
|
CLA_TRIGGER_MRINTA = 72U, //!< CLA Task Trigger Source is MRINTA
|
||||||
|
CLA_TRIGGER_MXINTB = 73U, //!< CLA Task Trigger Source is MXINTB
|
||||||
|
CLA_TRIGGER_MRINTB = 74U, //!< CLA Task Trigger Source is MRINTB
|
||||||
|
|
||||||
|
CLA_TRIGGER_ECAP1INT = 75U, //!< CLA Task Trigger Source is ECAP1INT
|
||||||
|
CLA_TRIGGER_ECAP2INT = 76U, //!< CLA Task Trigger Source is ECAP2INT
|
||||||
|
CLA_TRIGGER_ECAP3INT = 77U, //!< CLA Task Trigger Source is ECAP3INT
|
||||||
|
CLA_TRIGGER_ECAP4INT = 78U, //!< CLA Task Trigger Source is ECAP4INT
|
||||||
|
CLA_TRIGGER_ECAP5INT = 79U, //!< CLA Task Trigger Source is ECAP5INT
|
||||||
|
CLA_TRIGGER_ECAP6INT = 80U, //!< CLA Task Trigger Source is ECAP6INT
|
||||||
|
|
||||||
|
CLA_TRIGGER_EQEP1INT = 83U, //!< CLA Task Trigger Source is EQEP1INT
|
||||||
|
CLA_TRIGGER_EQEP2INT = 84U, //!< CLA Task Trigger Source is EQEP2INT
|
||||||
|
CLA_TRIGGER_EQEP3INT = 85U, //!< CLA Task Trigger Source is EQEP3INT
|
||||||
|
|
||||||
|
|
||||||
|
CLA_TRIGGER_SDFM1INT = 95U, //!< CLA Task Trigger Source is SDFM1INT
|
||||||
|
CLA_TRIGGER_SDFM2INT = 96U, //!< CLA Task Trigger Source is SDFM2INT
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
CLA_TRIGGER_UPP1INT = 107U, //!< CLA Task Trigger Source is UPP1INT
|
||||||
|
|
||||||
|
CLA_TRIGGER_SPITXAINT = 109U, //!< CLA Task Trigger Source is SPITXAINT
|
||||||
|
CLA_TRIGGER_SPIRXAINT = 110U, //!< CLA Task Trigger Source is SPIRXAINT
|
||||||
|
CLA_TRIGGER_SPITXBINT = 111U, //!< CLA Task Trigger Source is SPITXBINT
|
||||||
|
CLA_TRIGGER_SPIRXBINT = 112U, //!< CLA Task Trigger Source is SPIRXBINT
|
||||||
|
CLA_TRIGGER_SPITXCINT = 113U, //!< CLA Task Trigger Source is SPITXCINT
|
||||||
|
CLA_TRIGGER_SPIRXCINT = 114U, //!< CLA Task Trigger Source is SPIRXCINT
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
CLA_TRIGGER_CLB1INT = 127, //!< CLA Task Trigger Source is CLB1INT
|
||||||
|
CLA_TRIGGER_CLB2INT = 128, //!< CLA Task Trigger Source is CLB2INT
|
||||||
|
CLA_TRIGGER_CLB3INT = 129, //!< CLA Task Trigger Source is CLB3INT
|
||||||
|
CLA_TRIGGER_CLB4INT = 130, //!< CLA Task Trigger Source is CLB4INT
|
||||||
|
|
||||||
|
} CLA_Trigger;
|
||||||
|
#endif // __TMS320C28XX__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Prototypes for the APIs.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \internal
|
||||||
|
//! Checks a CLA base address.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//!
|
||||||
|
//! This function determines if a CLA controller base address is valid.
|
||||||
|
//!
|
||||||
|
//! \return Returns \b true if the base address is valid and \b false
|
||||||
|
//! otherwise.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef DEBUG
|
||||||
|
static inline bool
|
||||||
|
CLA_isBaseValid(uint32_t base)
|
||||||
|
{
|
||||||
|
return(base == CLA1_BASE);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __TMS320C28XX__ // These functions are only accessible from the C28x
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Map CLA Task Interrupt Vector
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//! \param claIntVect is CLA interrupt vector (MVECT1 to MVECT8)
|
||||||
|
//! the value of claIntVect can be any of the following:
|
||||||
|
//! - \b CLA_MVECT_1 - Task Interrupt Vector 1
|
||||||
|
//! - \b CLA_MVECT_2 - Task Interrupt Vector 2
|
||||||
|
//! - \b CLA_MVECT_3 - Task Interrupt Vector 3
|
||||||
|
//! - \b CLA_MVECT_4 - Task Interrupt Vector 4
|
||||||
|
//! - \b CLA_MVECT_5 - Task Interrupt Vector 5
|
||||||
|
//! - \b CLA_MVECT_6 - Task Interrupt Vector 6
|
||||||
|
//! - \b CLA_MVECT_7 - Task Interrupt Vector 7
|
||||||
|
//! - \b CLA_MVECT_8 - Task Interrupt Vector 8
|
||||||
|
//! \param claTaskAddr is the start address of the code for task
|
||||||
|
//!
|
||||||
|
//! Each CLA Task (1 to 8) has its own MVECTx register. When a task is
|
||||||
|
//! triggered, the CLA loads the MVECTx register of the task in question
|
||||||
|
//! to the MPC (CLA program counter) and begins execution from that point.
|
||||||
|
//! The CLA has a 16-bit address bus, and can therefore, access the lower
|
||||||
|
//! 64 KW space. The MVECTx registers take an address anywhere in this space.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
CLA_mapTaskVector(uint32_t base, CLA_MVECTNumber claIntVect,
|
||||||
|
uint16_t claTaskAddr)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Modify protected register
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
HWREGH(base + (uint16_t)claIntVect) = claTaskAddr;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Hard Reset
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//!
|
||||||
|
//! This function will cause a hard reset of the CLA and set all CLA registers
|
||||||
|
//! to their default state.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
CLA_performHardReset(uint32_t base)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Modify protected register
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Hard reset of the CLA
|
||||||
|
//
|
||||||
|
HWREGH(base + CLA_O_MCTL) |= CLA_MCTL_HARDRESET;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Wait for few cycles till the reset is complete
|
||||||
|
//
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Soft Reset
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//!
|
||||||
|
//! This function will cause a soft reset of the CLA. This will stop the
|
||||||
|
//! current task, clear the MIRUN flag and clear all bits in the MIER register.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
CLA_performSoftReset(uint32_t base)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Modify protected register
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Soft reset of the CLA
|
||||||
|
//
|
||||||
|
HWREGH(base + CLA_O_MCTL) |= CLA_MCTL_SOFTRESET;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Wait for few cycles till the reset is complete
|
||||||
|
//
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
NOP;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! IACK enable
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//!
|
||||||
|
//! This function enables the main CPU to use the IACK #16bit instruction to
|
||||||
|
//! set MIFR bits in the same manner as writing to the MIFRC register.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
CLA_enableIACK(uint32_t base)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Modify protected register
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable the main CPU to use the IACK #16bit instruction
|
||||||
|
//
|
||||||
|
HWREGH(base + CLA_O_MCTL) |= CLA_MCTL_IACKE;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! IACK disable
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//!
|
||||||
|
//! This function disables the main CPU to use the IACK #16bit instruction to
|
||||||
|
//! set MIFR bits in the same manner as writing to the MIFRC register.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
CLA_disableIACK(uint32_t base)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Modify protected register
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable the main CPU to use the IACK #16bit instruction
|
||||||
|
//
|
||||||
|
HWREGH(base + CLA_O_MCTL) &= ~CLA_MCTL_IACKE;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Query task N to see if it is flagged and pending execution
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//! \param taskNumber is the number of the task CLA_TASK_N where N is a number
|
||||||
|
//! from 1 to 8. Do not use CLA_TASKFLAG_ALL.
|
||||||
|
//!
|
||||||
|
//! This function gets the status of each bit in the interrupt flag register
|
||||||
|
//! corresponds to a CLA task. The corresponding bit is automatically set
|
||||||
|
//! when the task is triggered (either from a peripheral, through software, or
|
||||||
|
//! through the MIFRC register). The bit gets cleared when the CLA starts to
|
||||||
|
//! execute the flagged task.
|
||||||
|
//!
|
||||||
|
//! \return \b True if the queried task has been triggered but pending
|
||||||
|
//! execution.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline bool
|
||||||
|
CLA_getPendingTaskFlag(uint32_t base, CLA_TaskNumber taskNumber)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Read the run status register and return the appropriate value.
|
||||||
|
//
|
||||||
|
return(((HWREGH(base + CLA_O_MIFR) >> (uint16_t)taskNumber) & 1U) != 0U);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Get status of All Task Interrupt Flag
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//!
|
||||||
|
//! This function gets the value of the interrupt flag register (MIFR)
|
||||||
|
//!
|
||||||
|
//! \return the value of Interrupt Flag Register (MIFR)
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline uint16_t
|
||||||
|
CLA_getAllPendingTaskFlags(uint32_t base)
|
||||||
|
{
|
||||||
|
uint16_t status;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Just return the Interrupt Flag Register (MIFR) since that is what was
|
||||||
|
// requested.
|
||||||
|
//
|
||||||
|
status = HWREGH(base + CLA_O_MIFR);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Return the Interrupt Flag Register value
|
||||||
|
//
|
||||||
|
return(status);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Get status of Task n Interrupt Overflow Flag
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//! \param taskNumber is the number of the task CLA_TASK_N where N is a number
|
||||||
|
//! from 1 to 8. Do not use CLA_TASKFLAG_ALL.
|
||||||
|
//!
|
||||||
|
//! This function gets the status of each bit in the overflow flag register
|
||||||
|
//! corresponds to a CLA task, This bit is set when an interrupt overflow event
|
||||||
|
//! has occurred for the specific task.
|
||||||
|
//!
|
||||||
|
//! \return True if any of task interrupt overflow has occurred.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline bool
|
||||||
|
CLA_getTaskOverflowFlag(uint32_t base, CLA_TaskNumber taskNumber)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Read the run status register and return the appropriate value.
|
||||||
|
//
|
||||||
|
return(((HWREGH(base + CLA_O_MIOVF) >> (uint16_t)taskNumber) & 1U) != 0U);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Get status of All Task Interrupt Overflow Flag
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//!
|
||||||
|
//! This function gets the value of the Interrupt Overflow Flag Register
|
||||||
|
//!
|
||||||
|
//! \return the value of Interrupt Overflow Flag Register(MIOVF)
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline uint16_t
|
||||||
|
CLA_getAllTaskOverflowFlags(uint32_t base)
|
||||||
|
{
|
||||||
|
uint16_t status;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Just return Interrupt Overflow Flag Register(MIOVF) since that is what
|
||||||
|
// was requested.
|
||||||
|
//
|
||||||
|
status = HWREGH(base + CLA_O_MIOVF);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Return the Interrupt Overflow Flag Register
|
||||||
|
//
|
||||||
|
return(status);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Clear the task interrupt flag
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//! \param taskFlags is the bitwise OR of the tasks' flags to be cleared
|
||||||
|
//! CLA_TASKFLAG_N where N is the task number from 1 to 8, or CLA_TASKFLAG_ALL
|
||||||
|
//! to clear all flags.
|
||||||
|
//!
|
||||||
|
//! This function is used to manually clear bits in the interrupt
|
||||||
|
//! flag (MIFR) register
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
CLA_clearTaskFlags(uint32_t base, uint16_t taskFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
//Modify protected register
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear the task interrupt flag
|
||||||
|
//
|
||||||
|
HWREGH(base + CLA_O_MICLR) |= taskFlags;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Force a CLA Task
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//! \param taskFlags is the bitwise OR of the tasks' flags to be forced
|
||||||
|
//! CLA_TASKFLAG_N where N is the task number from 1 to 8, or CLA_TASKFLAG_ALL
|
||||||
|
//! to force all tasks.
|
||||||
|
//!
|
||||||
|
//! This function forces a task through software.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
CLA_forceTasks(uint32_t base, uint16_t taskFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Modify protected register
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Force the task interrupt.
|
||||||
|
//
|
||||||
|
HWREGH(base + CLA_O_MIFRC) |= taskFlags;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Enable CLA task(s)
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//! \param taskFlags is the bitwise OR of the tasks' flags to be enabled
|
||||||
|
//! CLA_TASKFLAG_N where N is the task number from 1 to 8, or CLA_TASKFLAG_ALL
|
||||||
|
//! to enable all tasks
|
||||||
|
//!
|
||||||
|
//! This function allows an incoming interrupt or main CPU software to
|
||||||
|
//! start the corresponding CLA task.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
CLA_enableTasks(uint32_t base, uint16_t taskFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Modify protected register
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable CLA task
|
||||||
|
//
|
||||||
|
HWREGH(base + CLA_O_MIER) |= taskFlags;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Disable CLA task interrupt
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//! \param taskFlags is the bitwise OR of the tasks' flags to be disabled
|
||||||
|
//! CLA_TASKFLAG_N where N is the task number from 1 to 8, or CLA_TASKFLAG_ALL
|
||||||
|
//! to disable all tasks
|
||||||
|
//!
|
||||||
|
//! This function disables CLA task interrupt by setting the MIER register bit
|
||||||
|
//! to 0, while the corresponding task is executing this will have no effect
|
||||||
|
//! on the task. The task will continue to run until it hits the MSTOP
|
||||||
|
//! instruction.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
CLA_disableTasks(uint32_t base, uint16_t taskFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Modify protected register
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Disable CLA task interrupt
|
||||||
|
//
|
||||||
|
HWREGH(base + CLA_O_MIER) &= ~taskFlags;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Get the value of a task run status
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//! \param taskNumber is the number of the task CLA_TASK_N where N is a number
|
||||||
|
//! from 1 to 8. Do not use CLA_TASKFLAG_ALL.
|
||||||
|
//!
|
||||||
|
//! This function gets the status of each bit in the Interrupt Run Status
|
||||||
|
//! Register which indicates whether the task is currently executing
|
||||||
|
//!
|
||||||
|
//! \return True if the task is executing.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline bool
|
||||||
|
CLA_getTaskRunStatus(uint32_t base, CLA_TaskNumber taskNumber)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Read the run status register and return the appropriate value.
|
||||||
|
//
|
||||||
|
return(((HWREGH(base + CLA_O_MIRUN) >> (uint16_t)taskNumber) & 1U) != 0U);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Get the value of all task run status
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//!
|
||||||
|
//! This function indicates which task is currently executing.
|
||||||
|
//!
|
||||||
|
//! \return the value of Interrupt Run Status Register (MIRUN)
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline uint16_t
|
||||||
|
CLA_getAllTaskRunStatus(uint32_t base)
|
||||||
|
{
|
||||||
|
uint16_t status;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Just return the Interrupt Run Status Register since that is what was
|
||||||
|
// requested.
|
||||||
|
//
|
||||||
|
status = HWREGH(base + CLA_O_MIRUN);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Return the Interrupt Run Status Register (MIRUN)
|
||||||
|
//
|
||||||
|
return(status);
|
||||||
|
}
|
||||||
|
#endif // #ifdef __TMS320C28XX__
|
||||||
|
|
||||||
|
//
|
||||||
|
// These functions are accessible only from the CLA (Type - 1/2)
|
||||||
|
//
|
||||||
|
#if defined(__TMS320C28XX_CLA1__) || defined(__TMS320C28XX_CLA2__)
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Enable the Software Interrupt for a given CLA Task
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//! \param taskFlags is the bitwise OR of the tasks for which software
|
||||||
|
//! interrupts are to be enabled, CLA_TASKFLAG_N where N is the task number
|
||||||
|
//! from 1 to 8, or CLA_TASKFLAG_ALL to enable software interrupts of all tasks
|
||||||
|
//!
|
||||||
|
//! This function enables the Software Interrupt for a single, or set of, CLA
|
||||||
|
//! task(s). It does this by writing a 1 to the task's bit in the
|
||||||
|
//! CLA1SOFTINTEN register. By setting a task's SOFTINT bit, you disable its
|
||||||
|
//! ability to generate an end-of-task interrupt
|
||||||
|
//! For example, if we enable Task 2's SOFTINT bit, we disable its ability to
|
||||||
|
//! generate an end-of-task interrupt, but now any running CLA task has the
|
||||||
|
//! ability to force task 2's interrupt (through the CLA1INTFRC register) to
|
||||||
|
//! the main CPU. This interrupt will be handled by the End-of-Task 2 interrupt
|
||||||
|
//! handler even though the interrupt was not caused by Task 2 running to
|
||||||
|
//! completion. This allows programmers to generate interrupts while a control
|
||||||
|
//! task is running.
|
||||||
|
//!
|
||||||
|
//! \note
|
||||||
|
//! -# The CLA1SOFTINTEN and CLA1INTFRC are only writable from the CLA.
|
||||||
|
//! -# Enabling a given task's software interrupt enable bit disables that
|
||||||
|
//! task's ability to generate an End-of-Task interrupt to the main CPU,
|
||||||
|
//! however, should another task force its interrupt (through the CLA1INTFRC
|
||||||
|
//! register), it will be handled by that task's End-of-Task Interrupt Handler.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
CLA_enableSoftwareInterrupt(uint32_t base, uint16_t taskFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Modify protected register
|
||||||
|
//
|
||||||
|
__meallow();
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable Software Interrupt
|
||||||
|
//
|
||||||
|
HWREGH(base + CLA_O_SOFTINTEN) |= taskFlags;
|
||||||
|
|
||||||
|
__medis();
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Disable the Software Interrupt for a given CLA Task
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//! \param taskFlags is the bitwise OR of the tasks for which software
|
||||||
|
//! interrupts are to be disabled, CLA_TASKFLAG_N where N is the task number
|
||||||
|
//! from 1 to 8, or CLA_TASKFLAG_ALL to disable software interrupts of all
|
||||||
|
//! tasks
|
||||||
|
//!
|
||||||
|
//! This function disables the Software Interrupt for a single, or set of, CLA
|
||||||
|
//! task(s). It does this by writing a 0 to the task's bit in the
|
||||||
|
//! CLA1SOFTINTEN register.
|
||||||
|
//!
|
||||||
|
//! \note
|
||||||
|
//! -# The CLA1SOFTINTEN and CLA1INTFRC are only writable from the CLA.
|
||||||
|
//! -# Disabling a given task's software interrupt ability allows that
|
||||||
|
//! task to generate an End-of-Task interrupt to the main CPU.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
CLA_disableSoftwareInterrupt(uint32_t base, uint16_t taskFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Modify protected register
|
||||||
|
//
|
||||||
|
__meallow();
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable Software Interrupt
|
||||||
|
//
|
||||||
|
HWREGH(base + CLA_O_SOFTINTEN) &= ~taskFlags;
|
||||||
|
|
||||||
|
__medis();
|
||||||
|
}
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Force a particular Task's Software Interrupt
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the CLA controller.
|
||||||
|
//! \param taskFlags is the bitwise OR of the task's whose software
|
||||||
|
//! interrupts are to be forced, CLA_TASKFLAG_N where N is the task number
|
||||||
|
//! from 1 to 8, or CLA_TASKFLAG_ALL to force software interrupts for all tasks
|
||||||
|
//!
|
||||||
|
//! This function forces the Software Interrupt for a single, or set of, CLA
|
||||||
|
//! task(s). It does this by writing a 1 to the task's bit in the
|
||||||
|
//! CLA1INTFRC register.
|
||||||
|
//! For example, if we enable Task 2's SOFTINT bit, we disable its ability to
|
||||||
|
//! generate an end-of-task interrupt, but now any running CLA task has the
|
||||||
|
//! ability to force task 2's interrupt (through the CLA1INTFRC register) to
|
||||||
|
//! the main CPU. This interrupt will be handled by the End-of-Task 2 interrupt
|
||||||
|
//! handler even though the interrupt was not caused by Task 2 running to
|
||||||
|
//! completion. This allows programmers to generate interrupts while a control
|
||||||
|
//! task is running.
|
||||||
|
//!
|
||||||
|
//! \note
|
||||||
|
//! -# The CLA1SOFTINTEN and CLA1INTFRC are only writable from the CLA.
|
||||||
|
//! -# Enabling a given task's software interrupt enable bit disables that
|
||||||
|
//! task's ability to generate an End-of-Task interrupt to the main CPU,
|
||||||
|
//! however, should another task force its interrupt (through the CLA1INTFRC
|
||||||
|
//! register), it will be handled by that task's End-of-Task Interrupt Handler.
|
||||||
|
//! -# This function will set the INTFRC bit for a task, but does not check
|
||||||
|
//! that its SOFTINT bit is set. It falls to the user to ensure that software
|
||||||
|
//! interrupt for a given task is enabled before it can be forced.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
CLA_forceSoftwareInterrupt(uint32_t base, uint16_t taskFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CLA_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Modify protected register
|
||||||
|
//
|
||||||
|
__meallow();
|
||||||
|
|
||||||
|
//
|
||||||
|
// Force Software Interrupt
|
||||||
|
//
|
||||||
|
HWREGH(base + CLA_O_SOFTINTFRC) |= taskFlags;
|
||||||
|
|
||||||
|
__medis();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif // #if defined(__TMS320C28XX_CLA1__) || defined(__TMS320C28XX_CLA2__)
|
||||||
|
|
||||||
|
//
|
||||||
|
// These functions can only be called from the C28x
|
||||||
|
//
|
||||||
|
#ifdef __TMS320C28XX__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Configures CLA task triggers.
|
||||||
|
//!
|
||||||
|
//! \param taskNumber is the number of the task CLA_TASK_N where N is a number
|
||||||
|
//! from 1 to 8.
|
||||||
|
//! \param trigger is the trigger source to be assigned to the selected task.
|
||||||
|
//!
|
||||||
|
//! This function configures the trigger source of a CLA task. The
|
||||||
|
//! \e taskNumber parameter indicates which task is being configured, and the
|
||||||
|
//! \e trigger parameter is the interrupt source from a specific peripheral
|
||||||
|
//! interrupt (or software) that will trigger the task.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void
|
||||||
|
CLA_setTriggerSource(CLA_TaskNumber taskNumber, CLA_Trigger trigger);
|
||||||
|
|
||||||
|
#endif //#ifdef __TMS320C28XX__
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Close the Doxygen group.
|
||||||
|
//! @}
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // CLA_H
|
||||||
@ -0,0 +1,145 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: clb.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x CLB driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "clb.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// CLB_configCounterLoadMatch
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void CLB_configCounterLoadMatch(uint32_t base, CLB_Counters counterID,
|
||||||
|
uint32_t load, uint32_t match1, uint32_t match2)
|
||||||
|
{
|
||||||
|
ASSERT(CLB_isBaseValid(base));
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
switch(counterID)
|
||||||
|
{
|
||||||
|
case CLB_CTR0:
|
||||||
|
CLB_writeInterface(base, CLB_ADDR_COUNTER_0_LOAD, load);
|
||||||
|
CLB_writeInterface(base, CLB_ADDR_COUNTER_0_MATCH1, match1);
|
||||||
|
CLB_writeInterface(base, CLB_ADDR_COUNTER_0_MATCH2, match2);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case CLB_CTR1:
|
||||||
|
CLB_writeInterface(base, CLB_ADDR_COUNTER_1_LOAD, load);
|
||||||
|
CLB_writeInterface(base, CLB_ADDR_COUNTER_1_MATCH1, match1);
|
||||||
|
CLB_writeInterface(base, CLB_ADDR_COUNTER_1_MATCH2, match2);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case CLB_CTR2:
|
||||||
|
CLB_writeInterface(base, CLB_ADDR_COUNTER_2_LOAD, load);
|
||||||
|
CLB_writeInterface(base, CLB_ADDR_COUNTER_2_MATCH1, match1);
|
||||||
|
CLB_writeInterface(base, CLB_ADDR_COUNTER_2_MATCH2, match2);
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
//
|
||||||
|
// Invalid counterID value
|
||||||
|
//
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// CLB_clearFIFOs
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void CLB_clearFIFOs(uint32_t base)
|
||||||
|
{
|
||||||
|
uint16_t i;
|
||||||
|
|
||||||
|
ASSERT(CLB_isBaseValid(base));
|
||||||
|
|
||||||
|
for(i = 0U; i < CLB_FIFO_SIZE; i++)
|
||||||
|
{
|
||||||
|
HWREG(base + CLB_DATAEXCH + CLB_O_PULL(i)) = 0U;
|
||||||
|
}
|
||||||
|
|
||||||
|
HWREG(base + CLB_LOGICCTL + CLB_O_BUF_PTR) = 0U;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// CLB_writeFIFOs
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void CLB_writeFIFOs(uint32_t base , const uint32_t pullData[])
|
||||||
|
{
|
||||||
|
ASSERT(CLB_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear the FIFO and pointer
|
||||||
|
//
|
||||||
|
CLB_clearFIFOs(base);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write data into the FIFO.
|
||||||
|
//
|
||||||
|
HWREG(base + CLB_DATAEXCH + CLB_O_PULL(0U)) = pullData[0U];
|
||||||
|
HWREG(base + CLB_DATAEXCH + CLB_O_PULL(1U)) = pullData[1U];
|
||||||
|
HWREG(base + CLB_DATAEXCH + CLB_O_PULL(2U)) = pullData[2U];
|
||||||
|
HWREG(base + CLB_DATAEXCH + CLB_O_PULL(3U)) = pullData[3U];
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// CLB_readFIFOs
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void CLB_readFIFOs(uint32_t base , uint32_t pushData[])
|
||||||
|
{
|
||||||
|
ASSERT(CLB_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Read data from the FIFO.
|
||||||
|
//
|
||||||
|
pushData[0U] = HWREG(base + CLB_DATAEXCH + CLB_O_PUSH(0U)) ;
|
||||||
|
pushData[1U] = HWREG(base + CLB_DATAEXCH + CLB_O_PUSH(1U)) ;
|
||||||
|
pushData[2U] = HWREG(base + CLB_DATAEXCH + CLB_O_PUSH(2U)) ;
|
||||||
|
pushData[3U] = HWREG(base + CLB_DATAEXCH + CLB_O_PUSH(3U)) ;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,223 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: cmpss.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x CMPSS driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "cmpss.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// CMPSS_configFilterHigh
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
CMPSS_configFilterHigh(uint32_t base, uint16_t samplePrescale,
|
||||||
|
uint16_t sampleWindow, uint16_t threshold)
|
||||||
|
{
|
||||||
|
uint16_t regValue;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CMPSS_isBaseValid(base));
|
||||||
|
ASSERT((threshold - 1U) >= ((sampleWindow - 1U) / 2U));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Shift the sample window and threshold values into the correct positions
|
||||||
|
// and write them to the appropriate register.
|
||||||
|
//
|
||||||
|
regValue = ((sampleWindow - 1U) << CMPSS_CTRIPHFILCTL_SAMPWIN_S) |
|
||||||
|
((threshold - 1U) << CMPSS_CTRIPHFILCTL_THRESH_S);
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
HWREGH(base + CMPSS_O_CTRIPHFILCTL) =
|
||||||
|
(HWREGH(base + CMPSS_O_CTRIPHFILCTL) &
|
||||||
|
~(CMPSS_CTRIPHFILCTL_SAMPWIN_M | CMPSS_CTRIPHFILCTL_THRESH_M)) |
|
||||||
|
regValue;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the filter sample clock prescale for the high comparator.
|
||||||
|
//
|
||||||
|
HWREGH(base + CMPSS_O_CTRIPHFILCLKCTL) = samplePrescale;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// CMPSS_configFilterLow
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
CMPSS_configFilterLow(uint32_t base, uint16_t samplePrescale,
|
||||||
|
uint16_t sampleWindow, uint16_t threshold)
|
||||||
|
{
|
||||||
|
uint16_t regValue;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CMPSS_isBaseValid(base));
|
||||||
|
ASSERT((threshold - 1U) >= ((sampleWindow - 1U) / 2U));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Shift the sample window and threshold values into the correct positions
|
||||||
|
// and write them to the appropriate register.
|
||||||
|
//
|
||||||
|
regValue = ((sampleWindow - 1U) << CMPSS_CTRIPLFILCTL_SAMPWIN_S) |
|
||||||
|
((threshold - 1U) << CMPSS_CTRIPLFILCTL_THRESH_S);
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
HWREGH(base + CMPSS_O_CTRIPLFILCTL) =
|
||||||
|
(HWREGH(base + CMPSS_O_CTRIPLFILCTL) &
|
||||||
|
~(CMPSS_CTRIPLFILCTL_SAMPWIN_M | CMPSS_CTRIPLFILCTL_THRESH_M)) |
|
||||||
|
regValue;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the filter sample clock prescale for the low comparator.
|
||||||
|
//
|
||||||
|
HWREGH(base + CMPSS_O_CTRIPLFILCLKCTL) = samplePrescale;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// CMPSS_configLatchOnPWMSYNC
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
CMPSS_configLatchOnPWMSYNC(uint32_t base, bool highEnable, bool lowEnable)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CMPSS_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// If the highEnable is true, set the bit that will enable PWMSYNC to reset
|
||||||
|
// the high comparator digital filter latch. If not, clear the bit.
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
if(highEnable)
|
||||||
|
{
|
||||||
|
HWREGH(base + CMPSS_O_COMPSTSCLR) |= CMPSS_COMPSTSCLR_HSYNCCLREN;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
HWREGH(base + CMPSS_O_COMPSTSCLR) &= ~CMPSS_COMPSTSCLR_HSYNCCLREN;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// If the lowEnable is true, set the bit that will enable PWMSYNC to reset
|
||||||
|
// the low comparator digital filter latch. If not, clear the bit.
|
||||||
|
//
|
||||||
|
if(lowEnable)
|
||||||
|
{
|
||||||
|
HWREGH(base + CMPSS_O_COMPSTSCLR) |= CMPSS_COMPSTSCLR_LSYNCCLREN;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
HWREGH(base + CMPSS_O_COMPSTSCLR) &= ~CMPSS_COMPSTSCLR_LSYNCCLREN;
|
||||||
|
}
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// CMPSS_configRamp
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
CMPSS_configRamp(uint32_t base, uint16_t maxRampVal, uint16_t decrementVal,
|
||||||
|
uint16_t delayVal, uint16_t pwmSyncSrc, bool useRampValShdw)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(CMPSS_isBaseValid(base));
|
||||||
|
ASSERT(delayVal <= CMPSS_RAMPDLYS_DELAY_M);
|
||||||
|
ASSERT((pwmSyncSrc >= 1U) && (pwmSyncSrc <= 12U));
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write the ramp generator source to the register
|
||||||
|
//
|
||||||
|
HWREGH(base + CMPSS_O_COMPDACCTL) =
|
||||||
|
(HWREGH(base + CMPSS_O_COMPDACCTL) &
|
||||||
|
~CMPSS_COMPDACCTL_RAMPSOURCE_M) |
|
||||||
|
((uint16_t)(pwmSyncSrc - 1U) << CMPSS_COMPDACCTL_RAMPSOURCE_S);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set or clear the bit that determines from where the max ramp value
|
||||||
|
// should be loaded.
|
||||||
|
//
|
||||||
|
if(useRampValShdw)
|
||||||
|
{
|
||||||
|
HWREGH(base + CMPSS_O_COMPDACCTL) |= CMPSS_COMPDACCTL_RAMPLOADSEL;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
HWREGH(base + CMPSS_O_COMPDACCTL) &= ~CMPSS_COMPDACCTL_RAMPLOADSEL;
|
||||||
|
}
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write the maximum ramp value to the shadow register.
|
||||||
|
//
|
||||||
|
HWREGH(base + CMPSS_O_RAMPMAXREFS) = maxRampVal;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write the ramp decrement value to the shadow register.
|
||||||
|
//
|
||||||
|
HWREGH(base + CMPSS_O_RAMPDECVALS) = decrementVal;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write the ramp delay value to the shadow register.
|
||||||
|
//
|
||||||
|
HWREGH(base + CMPSS_O_RAMPDLYS) = delayVal;
|
||||||
|
}
|
||||||
|
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,172 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: cpu.h
|
||||||
|
//
|
||||||
|
// TITLE: Useful C28x CPU defines.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#ifndef CPU_H
|
||||||
|
#define CPU_H
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include "stdint.h"
|
||||||
|
|
||||||
|
//
|
||||||
|
// External reference to the interrupt flag register (IFR) register
|
||||||
|
//
|
||||||
|
#ifndef __TMS320C28XX_CLA__
|
||||||
|
extern __cregister volatile uint16_t IFR;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// External reference to the interrupt enable register (IER) register
|
||||||
|
//
|
||||||
|
#ifndef __TMS320C28XX_CLA__
|
||||||
|
extern __cregister volatile uint16_t IER;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// Define to enable interrupts
|
||||||
|
//
|
||||||
|
#ifndef EINT
|
||||||
|
#define EINT __asm(" clrc INTM")
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// Define to disable interrupts
|
||||||
|
//
|
||||||
|
#ifndef DINT
|
||||||
|
#define DINT __asm(" setc INTM")
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// Define to enable debug events
|
||||||
|
//
|
||||||
|
#ifndef ERTM
|
||||||
|
#define ERTM __asm(" clrc DBGM")
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// Define to disable debug events
|
||||||
|
//
|
||||||
|
#ifndef DRTM
|
||||||
|
#define DRTM __asm(" setc DBGM")
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// Define to allow writes to protected registers
|
||||||
|
//
|
||||||
|
#ifndef EALLOW
|
||||||
|
#ifndef __TMS320C28XX_CLA__
|
||||||
|
#define EALLOW __eallow()
|
||||||
|
#else
|
||||||
|
#define EALLOW __meallow()
|
||||||
|
#endif // __TMS320C28XX_CLA__
|
||||||
|
#endif // EALLOW
|
||||||
|
|
||||||
|
//
|
||||||
|
// Define to disable writes to protected registers
|
||||||
|
//
|
||||||
|
#ifndef EDIS
|
||||||
|
#ifndef __TMS320C28XX_CLA__
|
||||||
|
#define EDIS __edis()
|
||||||
|
#else
|
||||||
|
#define EDIS __medis()
|
||||||
|
#endif // __TMS320C28XX_CLA__
|
||||||
|
#endif // EDIS
|
||||||
|
|
||||||
|
//
|
||||||
|
// Define for emulation stop
|
||||||
|
//
|
||||||
|
#ifndef ESTOP0
|
||||||
|
#define ESTOP0 __asm(" ESTOP0")
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// Define for emulation stop
|
||||||
|
//
|
||||||
|
#ifndef ESTOP1
|
||||||
|
#define ESTOP1 __asm(" ESTOP1")
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// Define for no operation
|
||||||
|
//
|
||||||
|
#ifndef NOP
|
||||||
|
#define NOP __asm(" NOP")
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//
|
||||||
|
// Define for putting processor into a low-power mode
|
||||||
|
//
|
||||||
|
#ifndef _DUAL_HEADERS
|
||||||
|
#ifndef IDLE
|
||||||
|
#define IDLE __asm(" IDLE")
|
||||||
|
#endif
|
||||||
|
#else
|
||||||
|
#define IDLE_ASM __asm(" IDLE");
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Extern compiler intrinsic prototypes. See compiler User's Guide for details.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void __eallow(void);
|
||||||
|
extern void __edis(void);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // CPU_H
|
||||||
@ -0,0 +1,61 @@
|
|||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// FILE: cputimer.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x CPU timer Driver
|
||||||
|
//
|
||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//#############################################################################
|
||||||
|
|
||||||
|
#include "cputimer.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// CPUTimer_setEmulationMode
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void CPUTimer_setEmulationMode(uint32_t base, CPUTimer_EmulationMode mode)
|
||||||
|
{
|
||||||
|
ASSERT(CPUTimer_isBaseValid(base));
|
||||||
|
//
|
||||||
|
// Write to FREE_SOFT bits of register TCR
|
||||||
|
//
|
||||||
|
HWREGH(base + CPUTIMER_O_TCR) =
|
||||||
|
(HWREGH(base + CPUTIMER_O_TCR) &
|
||||||
|
~(CPUTIMER_TCR_FREE | CPUTIMER_TCR_SOFT)) |
|
||||||
|
(uint16_t)mode;
|
||||||
|
}
|
||||||
|
|
||||||
@ -0,0 +1,509 @@
|
|||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// FILE: cputimer.h
|
||||||
|
//
|
||||||
|
// TITLE: C28x CPU timer Driver
|
||||||
|
//
|
||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//#############################################################################
|
||||||
|
|
||||||
|
#ifndef CPUTIMER_H
|
||||||
|
#define CPUTIMER_H
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __TMS320C28XX__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \addtogroup cputimer_api CPUTimer
|
||||||
|
//! @{
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#include <stdbool.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "inc/hw_memmap.h"
|
||||||
|
#include "inc/hw_types.h"
|
||||||
|
#include "inc/hw_cputimer.h"
|
||||||
|
#include "debug.h"
|
||||||
|
#include "sysctl.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Defines for the API.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Values that can be passed to CPUTimer_setEmulationMode() as the
|
||||||
|
//! \e mode parameter.
|
||||||
|
//
|
||||||
|
//****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
//! Denotes that the timer will stop after the next decrement
|
||||||
|
CPUTIMER_EMULATIONMODE_STOPAFTERNEXTDECREMENT = 0x0000,
|
||||||
|
//! Denotes that the timer will stop when it reaches zero
|
||||||
|
CPUTIMER_EMULATIONMODE_STOPATZERO = 0x0400,
|
||||||
|
//! Denotes that the timer will run free
|
||||||
|
CPUTIMER_EMULATIONMODE_RUNFREE = 0x0800
|
||||||
|
}CPUTimer_EmulationMode;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! The following are values that can be passed to
|
||||||
|
//! CPUTimer_selectClockSource() as the \e source parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
//! System Clock Source
|
||||||
|
CPUTIMER_CLOCK_SOURCE_SYS = 0x0,
|
||||||
|
//! Internal Oscillator 1 Clock Source
|
||||||
|
CPUTIMER_CLOCK_SOURCE_INTOSC1 = 0x1,
|
||||||
|
//! Internal Oscillator 2 Clock Source
|
||||||
|
CPUTIMER_CLOCK_SOURCE_INTOSC2 = 0x2,
|
||||||
|
//! External Clock Source
|
||||||
|
CPUTIMER_CLOCK_SOURCE_XTAL = 0x3,
|
||||||
|
//! Auxiliary PLL Clock Source
|
||||||
|
CPUTIMER_CLOCK_SOURCE_AUX = 0x6
|
||||||
|
} CPUTimer_ClockSource;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! The following are values that can be passed to
|
||||||
|
//! CPUTimer_selectClockSource() as the \e prescaler parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
CPUTIMER_CLOCK_PRESCALER_1 = 0, //!< Prescaler value of / 1
|
||||||
|
CPUTIMER_CLOCK_PRESCALER_2 = 1, //!< Prescaler value of / 2
|
||||||
|
CPUTIMER_CLOCK_PRESCALER_4 = 2, //!< Prescaler value of / 4
|
||||||
|
CPUTIMER_CLOCK_PRESCALER_8 = 3, //!< Prescaler value of / 8
|
||||||
|
CPUTIMER_CLOCK_PRESCALER_16 = 4 //!< Prescaler value of / 16
|
||||||
|
} CPUTimer_Prescaler;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \internal
|
||||||
|
//! Checks CPU timer base address.
|
||||||
|
//!
|
||||||
|
//! \param base specifies the Timer module base address.
|
||||||
|
//!
|
||||||
|
//! This function determines if a CPU timer module base address is valid.
|
||||||
|
//!
|
||||||
|
//! \return Returns \b true if the base address is valid and \b false
|
||||||
|
//! otherwise.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef DEBUG
|
||||||
|
static inline bool CPUTimer_isBaseValid(uint32_t base)
|
||||||
|
{
|
||||||
|
return((base == CPUTIMER0_BASE) || (base == CPUTIMER1_BASE) ||
|
||||||
|
(base == CPUTIMER2_BASE));
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Clears CPU timer overflow flag.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//!
|
||||||
|
//! This function clears the CPU timer overflow flag.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void CPUTimer_clearOverflowFlag(uint32_t base)
|
||||||
|
{
|
||||||
|
ASSERT(CPUTimer_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set TIF bit of TCR register
|
||||||
|
//
|
||||||
|
HWREGH(base + CPUTIMER_O_TCR) |= CPUTIMER_TCR_TIF;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Disables CPU timer interrupt.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//!
|
||||||
|
//! This function disables the CPU timer interrupt.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void CPUTimer_disableInterrupt(uint32_t base)
|
||||||
|
{
|
||||||
|
ASSERT(CPUTimer_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear TIE bit of TCR register
|
||||||
|
//
|
||||||
|
HWREGH(base + CPUTIMER_O_TCR) &= ~CPUTIMER_TCR_TIE;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Enables CPU timer interrupt.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//!
|
||||||
|
//! This function enables the CPU timer interrupt.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void CPUTimer_enableInterrupt(uint32_t base)
|
||||||
|
{
|
||||||
|
uint16_t tcrValue = 0;
|
||||||
|
ASSERT(CPUTimer_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set TIE bit of TCR register
|
||||||
|
//
|
||||||
|
tcrValue = HWREGH(base + CPUTIMER_O_TCR) & (~CPUTIMER_TCR_TIF);
|
||||||
|
HWREGH(base + CPUTIMER_O_TCR) = tcrValue | CPUTIMER_TCR_TIE;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Reloads CPU timer counter.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//!
|
||||||
|
//! This function reloads the CPU timer counter with the values contained in
|
||||||
|
//! the CPU timer period register.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void CPUTimer_reloadTimerCounter(uint32_t base)
|
||||||
|
{
|
||||||
|
uint16_t tcrValue = 0;
|
||||||
|
ASSERT(CPUTimer_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set TRB bit of register TCR
|
||||||
|
//
|
||||||
|
tcrValue = HWREGH(base + CPUTIMER_O_TCR) & (~CPUTIMER_TCR_TIF);
|
||||||
|
HWREGH(base + CPUTIMER_O_TCR) = tcrValue | CPUTIMER_TCR_TRB;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Stops CPU timer.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//!
|
||||||
|
//! This function stops the CPU timer.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void CPUTimer_stopTimer(uint32_t base)
|
||||||
|
{
|
||||||
|
uint16_t tcrValue = 0;
|
||||||
|
ASSERT(CPUTimer_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set TSS bit of register TCR
|
||||||
|
//
|
||||||
|
tcrValue = HWREGH(base + CPUTIMER_O_TCR) & (~CPUTIMER_TCR_TIF);
|
||||||
|
HWREGH(base + CPUTIMER_O_TCR) = tcrValue | CPUTIMER_TCR_TSS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Starts(restarts) CPU timer.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//!
|
||||||
|
//! This function starts (restarts) the CPU timer.
|
||||||
|
//!
|
||||||
|
//! \b Note: This function doesn't reset the timer counter.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void CPUTimer_resumeTimer(uint32_t base)
|
||||||
|
{
|
||||||
|
ASSERT(CPUTimer_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear TSS bit of register TCR
|
||||||
|
//
|
||||||
|
HWREGH(base + CPUTIMER_O_TCR) &= ~CPUTIMER_TCR_TSS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Starts(restarts) CPU timer.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//!
|
||||||
|
//! This function starts (restarts) the CPU timer.
|
||||||
|
//!
|
||||||
|
//! \b Note: This function reloads the timer counter.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void CPUTimer_startTimer(uint32_t base)
|
||||||
|
{
|
||||||
|
uint16_t tcrValue = 0;
|
||||||
|
ASSERT(CPUTimer_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Reload the timer counter
|
||||||
|
//
|
||||||
|
tcrValue = HWREGH(base + CPUTIMER_O_TCR) & (~CPUTIMER_TCR_TIF);
|
||||||
|
HWREGH(base + CPUTIMER_O_TCR) = tcrValue | CPUTIMER_TCR_TRB;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear TSS bit of register TCR
|
||||||
|
//
|
||||||
|
HWREGH(base + CPUTIMER_O_TCR) &= ~CPUTIMER_TCR_TSS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Sets CPU timer period.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//! \param periodCount is the CPU timer period count.
|
||||||
|
//!
|
||||||
|
//! This function sets the CPU timer period count.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void CPUTimer_setPeriod(uint32_t base, uint32_t periodCount)
|
||||||
|
{
|
||||||
|
ASSERT(CPUTimer_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Load the MSB period Count
|
||||||
|
//
|
||||||
|
HWREG(base + CPUTIMER_O_PRD) = periodCount;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Returns the current CPU timer counter value.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//!
|
||||||
|
//! This function returns the current CPU timer counter value.
|
||||||
|
//!
|
||||||
|
//! \return Returns the current CPU timer count value.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline uint32_t CPUTimer_getTimerCount(uint32_t base)
|
||||||
|
{
|
||||||
|
ASSERT(CPUTimer_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get the TIMH:TIM registers value
|
||||||
|
//
|
||||||
|
return(HWREG(base + CPUTIMER_O_TIM));
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Set CPU timer pre-scaler value.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//! \param prescaler is the CPU timer pre-scaler value.
|
||||||
|
//!
|
||||||
|
//! This function sets the pre-scaler value for the CPU timer. For every value
|
||||||
|
//! of (prescaler + 1), the CPU timer counter decrements by 1.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void CPUTimer_setPreScaler(uint32_t base, uint16_t prescaler)
|
||||||
|
{
|
||||||
|
ASSERT(CPUTimer_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Writes to TPR.TDDR and TPRH.TDDRH bits
|
||||||
|
//
|
||||||
|
HWREGH(base + CPUTIMER_O_TPRH) = prescaler >> 8U;
|
||||||
|
HWREGH(base + CPUTIMER_O_TPR) = (prescaler & CPUTIMER_TPR_TDDR_M) ;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Return the CPU timer overflow status.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//!
|
||||||
|
//! This function returns the CPU timer overflow status.
|
||||||
|
//!
|
||||||
|
//! \return Returns true if the CPU timer has overflowed, false if not.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline bool CPUTimer_getTimerOverflowStatus(uint32_t base)
|
||||||
|
{
|
||||||
|
ASSERT(CPUTimer_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check if TIF bits of register TCR are set
|
||||||
|
//
|
||||||
|
return(((HWREGH(base + CPUTIMER_O_TCR) & CPUTIMER_TCR_TIF) ==
|
||||||
|
CPUTIMER_TCR_TIF) ? true : false);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Select CPU Timer 2 Clock Source and Prescaler
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//! \param source is the clock source to use for CPU Timer 2
|
||||||
|
//! \param prescaler is the value that configures the selected clock source
|
||||||
|
//! relative to the system clock
|
||||||
|
//!
|
||||||
|
//! This function selects the specified clock source and prescaler value
|
||||||
|
//! for the CPU timer (CPU timer 2 only).
|
||||||
|
//!
|
||||||
|
//! The \e source parameter can be any one of the following:
|
||||||
|
//! - \b CPUTIMER_CLOCK_SOURCE_SYS - System Clock
|
||||||
|
//! - \b CPUTIMER_CLOCK_SOURCE_INTOSC1 - Internal Oscillator 1 Clock
|
||||||
|
//! - \b CPUTIMER_CLOCK_SOURCE_INTOSC2 - Internal Oscillator 2 Clock
|
||||||
|
//! - \b CPUTIMER_CLOCK_SOURCE_XTAL - External Clock
|
||||||
|
//! - \b CPUTIMER_CLOCK_SOURCE_AUX - Auxiliary PLL Clock
|
||||||
|
//!
|
||||||
|
//! The \e prescaler parameter can be any one of the following:
|
||||||
|
//! - \b CPUTIMER_CLOCK_PRESCALER_1 - Prescaler value of / 1
|
||||||
|
//! - \b CPUTIMER_CLOCK_PRESCALER_2 - Prescaler value of / 2
|
||||||
|
//! - \b CPUTIMER_CLOCK_PRESCALER_4 - Prescaler value of / 4
|
||||||
|
//! - \b CPUTIMER_CLOCK_PRESCALER_8 - Prescaler value of / 8
|
||||||
|
//! - \b CPUTIMER_CLOCK_PRESCALER_16 - Prescaler value of / 16
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void CPUTimer_selectClockSource(uint32_t base,
|
||||||
|
CPUTimer_ClockSource source,
|
||||||
|
CPUTimer_Prescaler prescaler)
|
||||||
|
{
|
||||||
|
ASSERT(base == CPUTIMER2_BASE);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set source and prescaler for CPU Timer 2
|
||||||
|
//
|
||||||
|
if(base == CPUTIMER2_BASE)
|
||||||
|
{
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set Clock Source
|
||||||
|
//
|
||||||
|
HWREGH(CPUSYS_BASE + SYSCTL_O_TMR2CLKCTL) =
|
||||||
|
(HWREGH(CPUSYS_BASE + SYSCTL_O_TMR2CLKCTL) &
|
||||||
|
~SYSCTL_TMR2CLKCTL_TMR2CLKSRCSEL_M) | (uint16_t)source;
|
||||||
|
SYSCTL_REGWRITE_DELAY;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set Clock Prescaler
|
||||||
|
//
|
||||||
|
HWREGH(CPUSYS_BASE + SYSCTL_O_TMR2CLKCTL) =
|
||||||
|
(HWREGH(CPUSYS_BASE + SYSCTL_O_TMR2CLKCTL) &
|
||||||
|
~SYSCTL_TMR2CLKCTL_TMR2CLKPRESCALE_M) |
|
||||||
|
((uint16_t)prescaler <<SYSCTL_TMR2CLKCTL_TMR2CLKPRESCALE_S);
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
SYSCTL_REGWRITE_DELAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Prototypes for the APIs.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Sets Emulation mode for CPU timer.
|
||||||
|
//!
|
||||||
|
//! \param base is the base address of the timer module.
|
||||||
|
//! \param mode is the emulation mode of the timer.
|
||||||
|
//!
|
||||||
|
//! This function sets the behaviour of CPU timer during emulation. Valid
|
||||||
|
//! values mode are: CPUTIMER_EMULATIONMODE_STOPAFTERNEXTDECREMENT,
|
||||||
|
//! CPUTIMER_EMULATIONMODE_STOPATZERO and CPUTIMER_EMULATIONMODE_RUNFREE.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void CPUTimer_setEmulationMode(uint32_t base,
|
||||||
|
CPUTimer_EmulationMode mode);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Close the Doxygen group.
|
||||||
|
//! @}
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#endif // #ifdef __TMS320C28XX__
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // CPUTIMER_H
|
||||||
@ -0,0 +1,93 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: dac.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x DAC driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "dac.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DAC_tuneOffsetTrim()
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
void
|
||||||
|
DAC_tuneOffsetTrim(uint32_t base, float32_t referenceVoltage)
|
||||||
|
{
|
||||||
|
uint16_t oldOffsetTrim;
|
||||||
|
float32_t newOffsetTrim;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
ASSERT(referenceVoltage > 0.0F);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get the sign-extended offset trim value
|
||||||
|
//
|
||||||
|
oldOffsetTrim = (HWREGH(base + DAC_O_TRIM) & DAC_TRIM_OFFSET_TRIM_M);
|
||||||
|
oldOffsetTrim = ((oldOffsetTrim & (uint16_t)DAC_REG_BYTE_MASK) ^
|
||||||
|
(uint16_t)0x80) - (uint16_t)0x80;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Calculate new offset trim value if DAC is operating at a reference
|
||||||
|
// voltage other than 2.5v.
|
||||||
|
//
|
||||||
|
newOffsetTrim = ((float32_t)(2.5 / referenceVoltage) *
|
||||||
|
(int16_t)oldOffsetTrim);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check if the new offset trim value is valid
|
||||||
|
//
|
||||||
|
ASSERT(((int16_t)newOffsetTrim > -129) && ((int16_t)newOffsetTrim < 128));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the new offset trim value
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
HWREGH(base + DAC_O_TRIM) = (HWREGH(base + DAC_O_TRIM) &
|
||||||
|
~DAC_TRIM_OFFSET_TRIM_M) |
|
||||||
|
(int16_t)newOffsetTrim;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
@ -0,0 +1,604 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: dac.h
|
||||||
|
//
|
||||||
|
// TITLE: C28x DAC driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#ifndef DAC_H
|
||||||
|
#define DAC_H
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \addtogroup dac_api DAC
|
||||||
|
//! @{
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#include <stdbool.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "inc/hw_dac.h"
|
||||||
|
#include "inc/hw_memmap.h"
|
||||||
|
#include "inc/hw_types.h"
|
||||||
|
#include "cpu.h"
|
||||||
|
#include "debug.h"
|
||||||
|
|
||||||
|
//
|
||||||
|
// A 8-bit register mask
|
||||||
|
//
|
||||||
|
#define DAC_REG_BYTE_MASK (0xFFU) //!< Register Byte Mask
|
||||||
|
|
||||||
|
//
|
||||||
|
// Lock Key
|
||||||
|
//
|
||||||
|
#define DAC_LOCK_KEY (0xA000U) //!< DAC Lock Key
|
||||||
|
|
||||||
|
#ifndef DOXYGEN_PDF_IGNORE
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the reg parameter of the
|
||||||
|
// DAC_lockRegister() and DAC_isRegisterLocked() functions.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define DAC_LOCK_CONTROL (0x1U) //!< Lock the control register
|
||||||
|
#define DAC_LOCK_SHADOW (0x2U) //!< Lock the shadow value register
|
||||||
|
#define DAC_LOCK_OUTPUT (0x4U) //!< Lock the output enable register
|
||||||
|
|
||||||
|
#endif // DOXYGEN_PDF_IGNORE
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Values that can be passed to DAC_setReferenceVoltage() as the \e source
|
||||||
|
//! parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
DAC_REF_VDAC = 0, //!< VDAC reference voltage
|
||||||
|
DAC_REF_ADC_VREFHI = 1 //!< ADC VREFHI reference voltage
|
||||||
|
}DAC_ReferenceVoltage;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Values that can be passed to DAC_setLoadMode() as the \e mode parameter.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
DAC_LOAD_SYSCLK = 0, //!< Load on next SYSCLK
|
||||||
|
DAC_LOAD_PWMSYNC = 4 //!< Load on next PWMSYNC specified by SYNCSEL
|
||||||
|
}DAC_LoadMode;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Prototypes for the APIs.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \internal
|
||||||
|
//! Checks DAC base address.
|
||||||
|
//!
|
||||||
|
//! \param base specifies the DAC module base address.
|
||||||
|
//!
|
||||||
|
//! This function determines if an DAC module base address is valid.
|
||||||
|
//!
|
||||||
|
//! \return Returns \b true if the base address is valid and \b false
|
||||||
|
//! otherwise.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef DEBUG
|
||||||
|
static inline bool
|
||||||
|
DAC_isBaseValid(uint32_t base)
|
||||||
|
{
|
||||||
|
return(
|
||||||
|
(base == DACA_BASE) ||
|
||||||
|
(base == DACB_BASE) ||
|
||||||
|
(base == DACC_BASE)
|
||||||
|
);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Get the DAC Revision value
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//!
|
||||||
|
//! This function gets the DAC revision value.
|
||||||
|
//!
|
||||||
|
//! \return Returns the DAC revision value.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline uint16_t
|
||||||
|
DAC_getRevision(uint32_t base)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get the revision value.
|
||||||
|
//
|
||||||
|
return(HWREGH(base + DAC_O_REV) & DAC_REV_REV_M);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Sets the DAC Reference Voltage
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//! \param source is the selected reference voltage
|
||||||
|
//!
|
||||||
|
//! This function sets the DAC reference voltage.
|
||||||
|
//!
|
||||||
|
//! The \e source parameter can have the following value:
|
||||||
|
//! - \b DAC_REF_VDAC - The VDAC reference voltage
|
||||||
|
//! - \b DAC_REF_ADC_VREFHI - The ADC VREFHI reference voltage
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
DAC_setReferenceVoltage(uint32_t base, DAC_ReferenceVoltage source)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the reference voltage
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
HWREGH(base + DAC_O_CTL) = (HWREGH(base + DAC_O_CTL) &
|
||||||
|
~DAC_CTL_DACREFSEL) | (uint16_t)source;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Sets the DAC Load Mode
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//! \param mode is the selected load mode
|
||||||
|
//!
|
||||||
|
//! This function sets the DAC load mode.
|
||||||
|
//!
|
||||||
|
//! The \e mode parameter can have one of two values:
|
||||||
|
//! - \b DAC_LOAD_SYSCLK - Load on next SYSCLK
|
||||||
|
//! - \b DAC_LOAD_PWMSYNC - Load on next PWMSYNC specified by SYNCSEL
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
DAC_setLoadMode(uint32_t base, DAC_LoadMode mode)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the load mode
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
HWREGH(base + DAC_O_CTL) = (HWREGH(base + DAC_O_CTL) &
|
||||||
|
~DAC_CTL_LOADMODE) | (uint16_t)mode;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Sets the DAC PWMSYNC Signal
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//! \param signal is the selected PWM signal
|
||||||
|
//!
|
||||||
|
//! This function sets the DAC PWMSYNC signal.
|
||||||
|
//!
|
||||||
|
//! The \e signal parameter must be set to a number that represents the PWM
|
||||||
|
//! signal that will be set. For instance, passing 2 into \e signal will
|
||||||
|
//! select PWM sync signal 2.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
DAC_setPWMSyncSignal(uint32_t base, uint16_t pwmSignal)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
ASSERT((pwmSignal > 0U) && (pwmSignal < 17U));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the PWM sync signal
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
HWREGH(base + DAC_O_CTL) = (HWREGH(base + DAC_O_CTL) &
|
||||||
|
~DAC_CTL_SYNCSEL_M) |
|
||||||
|
((uint16_t)(pwmSignal - 1U) <<
|
||||||
|
DAC_CTL_SYNCSEL_S);
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Get the DAC Active Output Value
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//!
|
||||||
|
//! This function gets the DAC active output value.
|
||||||
|
//!
|
||||||
|
//! \return Returns the DAC active output value.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline uint16_t
|
||||||
|
DAC_getActiveValue(uint32_t base)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get the active value
|
||||||
|
//
|
||||||
|
return(HWREGH(base + DAC_O_VALA) & DAC_VALA_DACVALA_M);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Set the DAC Shadow Output Value
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//! \param value is the 12-bit code to be loaded into the active value register
|
||||||
|
//!
|
||||||
|
//! This function sets the DAC shadow output value.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
DAC_setShadowValue(uint32_t base, uint16_t value)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
ASSERT(value <= DAC_VALS_DACVALS_M);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the shadow value
|
||||||
|
//
|
||||||
|
HWREGH(base + DAC_O_VALS) = (HWREGH(base + DAC_O_VALS) &
|
||||||
|
~DAC_VALS_DACVALS_M) |
|
||||||
|
(uint16_t)(value & DAC_VALS_DACVALS_M);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Get the DAC Shadow Output Value
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//!
|
||||||
|
//! This function gets the DAC shadow output value.
|
||||||
|
//!
|
||||||
|
//! \return Returns the DAC shadow output value.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline uint16_t
|
||||||
|
DAC_getShadowValue(uint32_t base)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get the shadow value
|
||||||
|
//
|
||||||
|
return(HWREGH(base + DAC_O_VALS) & DAC_VALS_DACVALS_M);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Enable the DAC Output
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//!
|
||||||
|
//! This function enables the DAC output.
|
||||||
|
//!
|
||||||
|
//! \note A delay is required after enabling the DAC. Further details
|
||||||
|
//! regarding the exact delay time length can be found in the device datasheet.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
DAC_enableOutput(uint32_t base)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable the output
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
HWREGH(base + DAC_O_OUTEN) |= DAC_OUTEN_DACOUTEN;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Disable the DAC Output
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//!
|
||||||
|
//! This function disables the DAC output.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
DAC_disableOutput(uint32_t base)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Disable the output
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
HWREGH(base + DAC_O_OUTEN) &= ~DAC_OUTEN_DACOUTEN;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Set DAC Offset Trim
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//! \param offset is the specified value for the offset trim
|
||||||
|
//!
|
||||||
|
//! This function sets the DAC offset trim. The \e offset value should be a
|
||||||
|
//! signed number in the range of -128 to 127.
|
||||||
|
//!
|
||||||
|
//! \note The offset should not be modified unless specifically indicated by
|
||||||
|
//! TI Errata or other documentation. Modifying the offset value could cause
|
||||||
|
//! this module to operate outside of the datasheet specifications.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
DAC_setOffsetTrim(uint32_t base, int16_t offset)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
ASSERT((offset > -129) && (offset < 128));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the offset trim value
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
HWREGH(base + DAC_O_TRIM) = (HWREGH(base + DAC_O_TRIM) &
|
||||||
|
~DAC_TRIM_OFFSET_TRIM_M) | (int16_t)offset;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Get DAC Offset Trim
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//!
|
||||||
|
//! This function gets the DAC offset trim value.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline int16_t
|
||||||
|
DAC_getOffsetTrim(uint32_t base)
|
||||||
|
{
|
||||||
|
uint16_t value;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get the sign-extended offset trim value
|
||||||
|
//
|
||||||
|
value = (HWREGH(base + DAC_O_TRIM) & DAC_TRIM_OFFSET_TRIM_M);
|
||||||
|
value = ((value & (uint16_t)DAC_REG_BYTE_MASK) ^ (uint16_t)0x80) -
|
||||||
|
(uint16_t)0x80;
|
||||||
|
|
||||||
|
return((int16_t)value);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Lock write-access to DAC Register
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//! \param reg is the selected DAC registers
|
||||||
|
//!
|
||||||
|
//! This function locks the write-access to the specified DAC register. Only a
|
||||||
|
//! system reset can unlock the register once locked.
|
||||||
|
//!
|
||||||
|
//! The \e reg parameter can be an ORed combination of any of the following
|
||||||
|
//! values:
|
||||||
|
//! - \b DAC_LOCK_CONTROL - Lock the DAC control register
|
||||||
|
//! - \b DAC_LOCK_SHADOW - Lock the DAC shadow value register
|
||||||
|
//! - \b DAC_LOCK_OUTPUT - Lock the DAC output enable/disable register
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
DAC_lockRegister(uint32_t base, uint16_t reg)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
ASSERT((reg & ~(DAC_LOCK_CONTROL | DAC_LOCK_SHADOW |
|
||||||
|
DAC_LOCK_OUTPUT)) == 0U);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Lock the specified registers
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
HWREGH(base + DAC_O_LOCK) |= (DAC_LOCK_KEY | reg);
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Check if DAC Register is locked
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//! \param reg is the selected DAC register locks to check
|
||||||
|
//!
|
||||||
|
//! This function checks if write-access has been locked on the specified DAC
|
||||||
|
//! register.
|
||||||
|
//!
|
||||||
|
//! The \e reg parameter can be an ORed combination of any of the following
|
||||||
|
//! values:
|
||||||
|
//! - \b DAC_LOCK_CONTROL - Lock the DAC control register
|
||||||
|
//! - \b DAC_LOCK_SHADOW - Lock the DAC shadow value register
|
||||||
|
//! - \b DAC_LOCK_OUTPUT - Lock the DAC output enable/disable register
|
||||||
|
//!
|
||||||
|
//! \return Returns \b true if any of the registers specified are locked, and
|
||||||
|
//! \b false if all specified registers aren't locked.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline bool
|
||||||
|
DAC_isRegisterLocked(uint32_t base, uint16_t reg)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DAC_isBaseValid(base));
|
||||||
|
ASSERT((reg & ~(DAC_LOCK_CONTROL | DAC_LOCK_SHADOW |
|
||||||
|
DAC_LOCK_OUTPUT)) == 0U);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Return the lock status on the specified registers
|
||||||
|
//
|
||||||
|
return((bool)((HWREGH(base + DAC_O_LOCK) & reg) != 0U));
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Tune DAC Offset Trim
|
||||||
|
//!
|
||||||
|
//! \param base is the DAC module base address
|
||||||
|
//! \param referenceVoltage is the reference voltage the DAC
|
||||||
|
//! module is operating at.
|
||||||
|
//!
|
||||||
|
//! This function adjusts/tunes the DAC offset trim. The \e referenceVoltage
|
||||||
|
//! value should be a floating point number in the range specified in the
|
||||||
|
//! device data manual.
|
||||||
|
//!
|
||||||
|
//! \note Use this function to adjust the DAC offset trim if operating
|
||||||
|
//! at a reference voltage other than 2.5v. Since this function modifies
|
||||||
|
//! the DAC offset trim register, it should only be called once after
|
||||||
|
//! Device_cal. If it is called multiple times after Device_cal, the offset
|
||||||
|
//! value scaled would be the wrong value.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void
|
||||||
|
DAC_tuneOffsetTrim(uint32_t base, float32_t referenceVoltage);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Close the Doxygen group.
|
||||||
|
//! @}
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // DAC_H
|
||||||
@ -0,0 +1,377 @@
|
|||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// FILE: dcsm.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x Driver for the DCSM security module.
|
||||||
|
//
|
||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//#############################################################################
|
||||||
|
|
||||||
|
#include "dcsm.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DCSM_unlockZone1CSM
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
DCSM_unlockZone1CSM(const DCSM_CSMPasswordKey * const psCMDKey)
|
||||||
|
{
|
||||||
|
uint32_t linkPointer;
|
||||||
|
uint32_t zsbBase = (DCSM_Z1OTP_BASE + 0x20U); // base address of the ZSB
|
||||||
|
int32_t bitPos = 28; // Bits [28:0] point to a ZSB (29-bit link pointer)
|
||||||
|
int32_t zeroFound = 0;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(psCMDKey != NULL);
|
||||||
|
|
||||||
|
linkPointer = HWREG(DCSM_Z1_BASE + DCSM_O_Z1_LINKPOINTER);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Bits 31 and 30 as most-significant 0 are invalid LinkPointer options
|
||||||
|
//
|
||||||
|
linkPointer = linkPointer << 3;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Zone-Select Block (ZSB) selection using Link-Pointers
|
||||||
|
// and 0's bit position within the Link pointer
|
||||||
|
//
|
||||||
|
while((zeroFound == 0) && (bitPos > -1))
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// The most significant bit position in the resolved link pointer
|
||||||
|
// which is 0, defines the valid base address for the ZSB.
|
||||||
|
//
|
||||||
|
if((linkPointer & 0x80000000U) == 0U)
|
||||||
|
{
|
||||||
|
zeroFound = 1;
|
||||||
|
//
|
||||||
|
// Base address of the ZSB is calculated using
|
||||||
|
// 0x10 as the slope/step with which zsbBase expands with
|
||||||
|
// change in the bitPos and 3*0x10 is the offset
|
||||||
|
//
|
||||||
|
zsbBase = (DCSM_Z1OTP_BASE + (((uint32_t)bitPos + 3U) * 0x10U));
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Move through the linkPointer to find the most significant
|
||||||
|
// bit position of 0
|
||||||
|
//
|
||||||
|
bitPos--;
|
||||||
|
linkPointer = linkPointer << 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Perform dummy reads on the 128-bit password
|
||||||
|
// Using linkPointer because it is no longer needed
|
||||||
|
//
|
||||||
|
linkPointer = HWREG(zsbBase + DCSM_O_Z1_CSMPSWD0);
|
||||||
|
linkPointer = HWREG(zsbBase + DCSM_O_Z1_CSMPSWD1);
|
||||||
|
linkPointer = HWREG(zsbBase + DCSM_O_Z1_CSMPSWD2);
|
||||||
|
linkPointer = HWREG(zsbBase + DCSM_O_Z1_CSMPSWD3);
|
||||||
|
|
||||||
|
if(psCMDKey != NULL)
|
||||||
|
{
|
||||||
|
HWREG(DCSM_Z1_BASE + DCSM_O_Z1_CSMKEY0) = psCMDKey->csmKey0;
|
||||||
|
HWREG(DCSM_Z1_BASE + DCSM_O_Z1_CSMKEY1) = psCMDKey->csmKey1;
|
||||||
|
HWREG(DCSM_Z1_BASE + DCSM_O_Z1_CSMKEY2) = psCMDKey->csmKey2;
|
||||||
|
HWREG(DCSM_Z1_BASE + DCSM_O_Z1_CSMKEY3) = psCMDKey->csmKey3;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DCSM_unlockZone2CSM
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
DCSM_unlockZone2CSM(const DCSM_CSMPasswordKey * const psCMDKey)
|
||||||
|
{
|
||||||
|
uint32_t linkPointer;
|
||||||
|
uint32_t zsbBase = (DCSM_Z2OTP_BASE + 0x20U); // base address of the ZSB
|
||||||
|
int32_t bitPos = 28; // Bits [28:0] point to a ZSB (29-bit link pointer)
|
||||||
|
int32_t zeroFound = 0;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(psCMDKey != NULL);
|
||||||
|
|
||||||
|
linkPointer = HWREG(DCSM_Z2_BASE + DCSM_O_Z2_LINKPOINTER);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Bits 31 and 30 as most-significant 0 are invalid LinkPointer options
|
||||||
|
//
|
||||||
|
linkPointer = linkPointer << 3;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Zone-Select Block (ZSB) selection using Link-Pointers
|
||||||
|
// and 0's bit position within the Link pointer
|
||||||
|
//
|
||||||
|
while((zeroFound == 0) && (bitPos > -1))
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// The most significant bit position in the resolved link pointer
|
||||||
|
// which is 0, defines the valid base address for the ZSB.
|
||||||
|
//
|
||||||
|
if((linkPointer & 0x80000000U) == 0U)
|
||||||
|
{
|
||||||
|
zeroFound = 1;
|
||||||
|
//
|
||||||
|
// Base address of the ZSB is calculated using
|
||||||
|
// 0x10 as the slope/step with which zsbBase expands with
|
||||||
|
// change in the bitPos and 3*0x10 is the offset
|
||||||
|
//
|
||||||
|
zsbBase = (DCSM_Z2OTP_BASE + (((uint32_t)bitPos + 3U) * 0x10U));
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Move through the linkPointer to find the most significant
|
||||||
|
// bit position of 0
|
||||||
|
//
|
||||||
|
bitPos--;
|
||||||
|
linkPointer = linkPointer << 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Perform dummy reads on the 128-bit password
|
||||||
|
// Using linkPointer because it is no longer needed
|
||||||
|
//
|
||||||
|
linkPointer = HWREG(zsbBase + DCSM_O_Z2_CSMPSWD0);
|
||||||
|
linkPointer = HWREG(zsbBase + DCSM_O_Z2_CSMPSWD1);
|
||||||
|
linkPointer = HWREG(zsbBase + DCSM_O_Z2_CSMPSWD2);
|
||||||
|
linkPointer = HWREG(zsbBase + DCSM_O_Z2_CSMPSWD3);
|
||||||
|
|
||||||
|
if(psCMDKey != NULL)
|
||||||
|
{
|
||||||
|
HWREG(DCSM_Z2_BASE + DCSM_O_Z2_CSMKEY0) = psCMDKey->csmKey0;
|
||||||
|
HWREG(DCSM_Z2_BASE + DCSM_O_Z2_CSMKEY1) = psCMDKey->csmKey1;
|
||||||
|
HWREG(DCSM_Z2_BASE + DCSM_O_Z2_CSMKEY2) = psCMDKey->csmKey2;
|
||||||
|
HWREG(DCSM_Z2_BASE + DCSM_O_Z2_CSMKEY3) = psCMDKey->csmKey3;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DCSM_getZone1FlashEXEStatus
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
DCSM_EXEOnlyStatus
|
||||||
|
DCSM_getZone1FlashEXEStatus(DCSM_Sector sector)
|
||||||
|
{
|
||||||
|
uint16_t regValue;
|
||||||
|
DCSM_EXEOnlyStatus status;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check if sector belongs to this zone
|
||||||
|
//
|
||||||
|
if(DCSM_getFlashSectorZone(sector) != DCSM_MEMORY_ZONE1)
|
||||||
|
{
|
||||||
|
status = DCSM_INCORRECT_ZONE;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Get the EXE status register
|
||||||
|
//
|
||||||
|
regValue = HWREGH(DCSM_Z1_BASE + DCSM_O_Z1_EXEONLYSECTR);
|
||||||
|
//
|
||||||
|
// Get the EXE status of the Flash Sector
|
||||||
|
//
|
||||||
|
status = (DCSM_EXEOnlyStatus)((uint16_t)
|
||||||
|
((regValue >> (uint16_t)sector) &
|
||||||
|
0x01U));
|
||||||
|
}
|
||||||
|
return(status);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DCSM_getZone1RAMEXEStatus
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
DCSM_EXEOnlyStatus
|
||||||
|
DCSM_getZone1RAMEXEStatus(DCSM_RAMModule module)
|
||||||
|
{
|
||||||
|
ASSERT(module != DCSM_CLA);
|
||||||
|
uint32_t status;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check if module belongs to this zone
|
||||||
|
//
|
||||||
|
if(DCSM_getRAMZone(module) != DCSM_MEMORY_ZONE1)
|
||||||
|
{
|
||||||
|
status = DCSM_INCORRECT_ZONE;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Get the EXE status of the RAM Module
|
||||||
|
//
|
||||||
|
status = (uint16_t)((HWREGH(DCSM_Z1_BASE + DCSM_O_Z1_EXEONLYRAMR) >>
|
||||||
|
(uint16_t)module) & 0x01U);
|
||||||
|
}
|
||||||
|
return((DCSM_EXEOnlyStatus)status);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DCSM_getZone2FlashEXEStatus
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
DCSM_EXEOnlyStatus
|
||||||
|
DCSM_getZone2FlashEXEStatus(DCSM_Sector sector)
|
||||||
|
{
|
||||||
|
uint16_t regValue;
|
||||||
|
DCSM_EXEOnlyStatus status;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check if sector belongs to this zone
|
||||||
|
//
|
||||||
|
if(DCSM_getFlashSectorZone(sector) != DCSM_MEMORY_ZONE2)
|
||||||
|
{
|
||||||
|
status = DCSM_INCORRECT_ZONE;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Get the EXE status register
|
||||||
|
//
|
||||||
|
regValue = HWREGH(DCSM_Z2_BASE + DCSM_O_Z2_EXEONLYSECTR);
|
||||||
|
//
|
||||||
|
// Get the EXE status of the Flash Sector
|
||||||
|
//
|
||||||
|
status = (DCSM_EXEOnlyStatus)((uint16_t)((regValue >>
|
||||||
|
(uint16_t)sector) & 0x01U));
|
||||||
|
}
|
||||||
|
|
||||||
|
return(status);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DCSM_getZone2RAMEXEStatus
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
DCSM_EXEOnlyStatus
|
||||||
|
DCSM_getZone2RAMEXEStatus(DCSM_RAMModule module)
|
||||||
|
{
|
||||||
|
ASSERT(module != DCSM_CLA);
|
||||||
|
uint32_t status;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check if module belongs to this zone
|
||||||
|
//
|
||||||
|
if(DCSM_getRAMZone(module) != DCSM_MEMORY_ZONE2)
|
||||||
|
{
|
||||||
|
status = DCSM_INCORRECT_ZONE;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Get the EXE status of the RAM Module
|
||||||
|
//
|
||||||
|
status = (uint16_t)((HWREGH(DCSM_Z2_BASE +
|
||||||
|
DCSM_O_Z2_EXEONLYRAMR) >> (uint16_t)module) & 0x01U);
|
||||||
|
}
|
||||||
|
return((DCSM_EXEOnlyStatus)status);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DCSM_claimZoneSemaphore
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
bool
|
||||||
|
DCSM_claimZoneSemaphore(DCSM_SemaphoreZone zone)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// FLSEM register address.
|
||||||
|
//
|
||||||
|
uint32_t regAddress = DCSMCOMMON_BASE + DCSM_O_FLSEM;
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write 0xA5 to the key and write the zone that is attempting to claim the
|
||||||
|
// Flash Pump Semaphore to the semaphore bits.
|
||||||
|
//
|
||||||
|
HWREGH(regAddress) = ((uint16_t)FLSEM_KEY << DCSM_FLSEM_KEY_S) |
|
||||||
|
(uint16_t)zone;
|
||||||
|
EDIS;
|
||||||
|
|
||||||
|
//
|
||||||
|
// If the calling function was unable to claim the zone semaphore, then
|
||||||
|
// return false
|
||||||
|
//
|
||||||
|
return(((HWREGH(regAddress) & DCSM_FLSEM_SEM_M) == (uint16_t)zone) ?
|
||||||
|
true : false);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DCSM_releaseZoneSemaphore
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
bool
|
||||||
|
DCSM_releaseZoneSemaphore(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// FLSEM register address.
|
||||||
|
//
|
||||||
|
uint32_t regAddress = DCSMCOMMON_BASE + DCSM_O_FLSEM;
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write 0xA5 to the key and write the zone that is attempting to claim the
|
||||||
|
// Flash Pump Semaphore to the semaphore bits.
|
||||||
|
//
|
||||||
|
HWREGH(regAddress) = ((uint16_t)FLSEM_KEY << DCSM_FLSEM_KEY_S);
|
||||||
|
EDIS;
|
||||||
|
|
||||||
|
//
|
||||||
|
// If the calling function was unable to release the zone semaphore, then
|
||||||
|
// return false
|
||||||
|
//
|
||||||
|
return(((HWREGH(regAddress) & DCSM_FLSEM_SEM_M) == 0x0U) ? true : false);
|
||||||
|
}
|
||||||
|
|
||||||
@ -0,0 +1,669 @@
|
|||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// FILE: dcsm.h
|
||||||
|
//
|
||||||
|
// TITLE: C28x Driver for the DCSM security module.
|
||||||
|
//
|
||||||
|
//#############################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//#############################################################################
|
||||||
|
|
||||||
|
#ifndef DCSM_H
|
||||||
|
#define DCSM_H
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// If building with a C++ compiler, make all of the definitions in this header
|
||||||
|
// have a C binding.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! \addtogroup dcsm_api DCSM
|
||||||
|
//! @{
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#include <stdbool.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "inc/hw_dcsm.h"
|
||||||
|
#include "inc/hw_types.h"
|
||||||
|
#include "inc/hw_memmap.h"
|
||||||
|
#include "inc/hw_sysctl.h"
|
||||||
|
#include "cpu.h"
|
||||||
|
#include "debug.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Defines for the unlockZone1CSM() and unlockZone2CSM().
|
||||||
|
// These are not parameters for any function.
|
||||||
|
// These are not intended for application code.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
#define DCSM_O_Z1_CSMPSWD0 0x08U //!< Z1 CSMPSWD0 offset
|
||||||
|
#define DCSM_O_Z1_CSMPSWD1 0x0AU //!< Z1 CSMPSWD1 offset
|
||||||
|
#define DCSM_O_Z1_CSMPSWD2 0x0CU //!< Z1 CSMPSWD2 offset
|
||||||
|
#define DCSM_O_Z1_CSMPSWD3 0x0EU //!< Z1 CSMPSWD3 offset
|
||||||
|
#define DCSM_O_Z2_CSMPSWD0 0x08U //!< Z2 CSMPSWD0 offset
|
||||||
|
#define DCSM_O_Z2_CSMPSWD1 0x0AU //!< Z2 CSMPSWD1 offset
|
||||||
|
#define DCSM_O_Z2_CSMPSWD2 0x0CU //!< Z2 CSMPSWD2 offset
|
||||||
|
#define DCSM_O_Z2_CSMPSWD3 0x0EU //!< Z2 CSMPSWD3 offset
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Register key defines.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define FLSEM_KEY 0xA5U //!< Zone semaphore key
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Data structures to hold password keys.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t csmKey0;
|
||||||
|
uint32_t csmKey1;
|
||||||
|
uint32_t csmKey2;
|
||||||
|
uint32_t csmKey3;
|
||||||
|
} DCSM_CSMPasswordKey;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Values to distinguish the status of RAM or FLASH sectors. These values
|
||||||
|
//! describe which zone the memory location belongs too.
|
||||||
|
//! These values can be returned from DCSM_getRAMZone(),
|
||||||
|
//! DCSM_getFlashSectorZone().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
DCSM_MEMORY_INACCESSIBLE, //!< Inaccessible
|
||||||
|
DCSM_MEMORY_ZONE1, //!< Zone 1
|
||||||
|
DCSM_MEMORY_ZONE2, //!< Zone 2
|
||||||
|
DCSM_MEMORY_FULL_ACCESS //!< Full access
|
||||||
|
} DCSM_MemoryStatus;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Values to pass to DCSM_claimZoneSemaphore(). These values are used
|
||||||
|
//! to describe the zone that can write to Flash Wrapper registers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
DCSM_FLSEM_ZONE1 = 0x01U, //!< Flash semaphore Zone 1
|
||||||
|
DCSM_FLSEM_ZONE2 = 0x02U //!< Flash semaphore Zone 2
|
||||||
|
} DCSM_SemaphoreZone;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Values to distinguish the security status of the zones.
|
||||||
|
//! These values can be returned from DCSM_getZone1CSMSecurityStatus(),
|
||||||
|
//! DCSM_getZone2CSMSecurityStatus().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
DCSM_STATUS_SECURE, //!< Secure
|
||||||
|
DCSM_STATUS_UNSECURE, //!< Unsecure
|
||||||
|
DCSM_STATUS_LOCKED, //!< Locked
|
||||||
|
} DCSM_SecurityStatus;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Values to distinguish the status of the Control Registers. These values
|
||||||
|
// describe can be used with the return values of
|
||||||
|
// DCSM_getZone1ControlStatus(), and DCSM_getZone2ControlStatus().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#define DCSM_ALLZERO 0x08U //!< CSM Passwords all zeros
|
||||||
|
#define DCSM_ALLONE 0x10U //!< CSM Passwords all ones
|
||||||
|
#define DCSM_UNSECURE 0x20U //!< Zone is secure/unsecure
|
||||||
|
#define DCSM_ARMED 0x40U //!< CSM is armed
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Values to decribe the EXEONLY Status.
|
||||||
|
//! These values are returned from to DCSM_getZone1RAMEXEStatus(),
|
||||||
|
//! DCSM_getZone2RAMEXEStatus(), DCSM_getZone1FlashEXEStatus(),
|
||||||
|
//! DCSM_getZone2FlashEXEStatus().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
DCSM_PROTECTED, //!< Protected
|
||||||
|
DCSM_UNPROTECTED, //!< Unprotected
|
||||||
|
DCSM_INCORRECT_ZONE //!< Incorrect Zone
|
||||||
|
}DCSM_EXEOnlyStatus;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Values to distinguish RAM Module.
|
||||||
|
//! These values can be passed to DCSM_getZone1RAMEXEStatus()
|
||||||
|
//! DCSM_getZone2RAMEXEStatus(), DCSM_getRAMZone().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
//
|
||||||
|
//C28x RAMs
|
||||||
|
//
|
||||||
|
DCSM_RAMLS0, //!< RAMLS0
|
||||||
|
DCSM_RAMLS1, //!< RAMLS1
|
||||||
|
DCSM_RAMLS2, //!< RAMLS2
|
||||||
|
DCSM_RAMLS3, //!< RAMLS3
|
||||||
|
DCSM_RAMLS4, //!< RAMLS4
|
||||||
|
DCSM_RAMLS5, //!< RAMLS5
|
||||||
|
DCSM_RAMD0, //!< RAMD0
|
||||||
|
DCSM_RAMD1, //!< RAMD1
|
||||||
|
DCSM_CLA = 14U //!<Offset of CLA field in in RAMSTAT divided by two
|
||||||
|
} DCSM_RAMModule;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Values to distinguish Flash Sector.
|
||||||
|
//! These values can be passed to DCSM_getZone1FlashEXEStatus()
|
||||||
|
//! DCSM_getZone2FlashEXEStatus(), DCSM_getFlashSectorZone().
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
DCSM_SECTOR_A, //!< Sector A
|
||||||
|
DCSM_SECTOR_B, //!< Sector B
|
||||||
|
DCSM_SECTOR_C, //!< Sector C
|
||||||
|
DCSM_SECTOR_D, //!< Sector D
|
||||||
|
DCSM_SECTOR_E, //!< Sector E
|
||||||
|
DCSM_SECTOR_F, //!< Sector F
|
||||||
|
DCSM_SECTOR_G, //!< Sector G
|
||||||
|
DCSM_SECTOR_H, //!< Sector H
|
||||||
|
DCSM_SECTOR_I, //!< Sector I
|
||||||
|
DCSM_SECTOR_J, //!< Sector J
|
||||||
|
DCSM_SECTOR_K, //!< Sector K
|
||||||
|
DCSM_SECTOR_L, //!< Sector L
|
||||||
|
DCSM_SECTOR_M, //!< Sector M
|
||||||
|
DCSM_SECTOR_N, //!< Sector N
|
||||||
|
} DCSM_Sector;
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DCSM functions
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Secures zone 1 by setting the FORCESEC bit of Z1_CR register
|
||||||
|
//!
|
||||||
|
//! This function resets the state of the zone. If the zone is unlocked,
|
||||||
|
//! it will lock(secure) the zone and also reset all the bits in the
|
||||||
|
//! Control Register.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
DCSM_secureZone1(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Write to the FORCESEC bit.
|
||||||
|
//
|
||||||
|
HWREGH(DCSM_Z1_BASE + DCSM_O_Z1_CR)|= DCSM_Z1_CR_FORCESEC;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Secures zone 2 by setting the FORCESEC bit of Z2_CR register
|
||||||
|
//!
|
||||||
|
//! This function resets the state of the zone. If the zone is unlocked,
|
||||||
|
//! it will lock(secure) the zone and also reset all the bits in the
|
||||||
|
//! Control Register.
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline void
|
||||||
|
DCSM_secureZone2(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Write to the FORCESEC bit.
|
||||||
|
//
|
||||||
|
HWREGH(DCSM_Z2_BASE + DCSM_O_Z2_CR)|= DCSM_Z2_CR_FORCESEC;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Returns the CSM security status of zone 1
|
||||||
|
//!
|
||||||
|
//! This function returns the security status of zone 1 CSM
|
||||||
|
//!
|
||||||
|
//! \return Returns security status as an enumerated type DCSM_SecurityStatus.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline DCSM_SecurityStatus
|
||||||
|
DCSM_getZone1CSMSecurityStatus(void)
|
||||||
|
{
|
||||||
|
uint16_t status;
|
||||||
|
DCSM_SecurityStatus returnStatus;
|
||||||
|
status = HWREGH(DCSM_Z1_BASE + DCSM_O_Z1_CR);
|
||||||
|
|
||||||
|
//
|
||||||
|
// if ARMED bit is set and UNSECURED bit or ALLONE bit or both UNSECURED
|
||||||
|
// and ALLONE bits are set then CSM is unsecured. Else it is secure.
|
||||||
|
//
|
||||||
|
if(((status & DCSM_Z1_CR_ARMED) != 0U) &&
|
||||||
|
(((status & DCSM_Z1_CR_UNSECURE) != 0U) ||
|
||||||
|
((status & DCSM_Z1_CR_ALLONE) != 0U )))
|
||||||
|
{
|
||||||
|
returnStatus = DCSM_STATUS_UNSECURE;
|
||||||
|
}
|
||||||
|
else if((status & DCSM_Z1_CR_ALLZERO) == DCSM_Z1_CR_ALLZERO)
|
||||||
|
{
|
||||||
|
returnStatus = DCSM_STATUS_LOCKED;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
returnStatus = DCSM_STATUS_SECURE;
|
||||||
|
}
|
||||||
|
|
||||||
|
return(returnStatus);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Returns the CSM security status of zone 2
|
||||||
|
//!
|
||||||
|
//! This function returns the security status of zone 2 CSM
|
||||||
|
//!
|
||||||
|
//! \return Returns security status as an enumerated type DCSM_SecurityStatus.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline DCSM_SecurityStatus
|
||||||
|
DCSM_getZone2CSMSecurityStatus(void)
|
||||||
|
{
|
||||||
|
uint16_t status;
|
||||||
|
DCSM_SecurityStatus returnStatus;
|
||||||
|
status = HWREGH(DCSM_Z2_BASE + DCSM_O_Z2_CR);
|
||||||
|
|
||||||
|
//
|
||||||
|
// if ARMED bit is set and UNSECURED bit or ALLONE bit or both UNSECURED
|
||||||
|
// and ALLONE bits are set then CSM is unsecured. Else it is secure.
|
||||||
|
//
|
||||||
|
if(((status & DCSM_Z2_CR_ARMED) != 0U) &&
|
||||||
|
(((status & DCSM_Z2_CR_UNSECURE) != 0U) ||
|
||||||
|
((status & DCSM_Z2_CR_ALLONE) != 0U )))
|
||||||
|
{
|
||||||
|
returnStatus = DCSM_STATUS_UNSECURE;
|
||||||
|
}
|
||||||
|
else if((status & DCSM_Z2_CR_ALLZERO) == DCSM_Z2_CR_ALLZERO)
|
||||||
|
{
|
||||||
|
returnStatus = DCSM_STATUS_LOCKED;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
returnStatus = DCSM_STATUS_SECURE;
|
||||||
|
}
|
||||||
|
|
||||||
|
return(returnStatus);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Returns the Control Status of zone 1
|
||||||
|
//!
|
||||||
|
//! This function returns the Control Status of zone 1 CSM
|
||||||
|
//!
|
||||||
|
//! \return Returns the contents of the Control Register which can be
|
||||||
|
//! used with provided defines.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline uint16_t
|
||||||
|
DCSM_getZone1ControlStatus(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Return the contents of the CR register.
|
||||||
|
//
|
||||||
|
return(HWREGH(DCSM_Z1_BASE + DCSM_O_Z1_CR));
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Returns the Control Status of zone 2
|
||||||
|
//!
|
||||||
|
//! This function returns the Control Status of zone 2 CSM
|
||||||
|
//!
|
||||||
|
//! \return Returns the contents of the Control Register which can be
|
||||||
|
//! used with the provided defines.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline uint16_t
|
||||||
|
DCSM_getZone2ControlStatus(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Return the contents of the CR register.
|
||||||
|
//
|
||||||
|
return(HWREGH(DCSM_Z2_BASE + DCSM_O_Z2_CR));
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Returns the security zone a RAM section belongs to
|
||||||
|
//!
|
||||||
|
//! \param module is the RAM module value. Valid values are type DCSM_RAMModule
|
||||||
|
//! C28x RAMs :
|
||||||
|
//! - \b DCSM_RAMLS0
|
||||||
|
//! - \b DCSM_RAMLS1
|
||||||
|
//! - \b DCSM_RAMLS2
|
||||||
|
//! - \b DCSM_RAMLS3
|
||||||
|
//! - \b DCSM_RAMLS4
|
||||||
|
//! - \b DCSM_RAMLS5
|
||||||
|
//! - \b DCSM_RAMD0
|
||||||
|
//! - \b DCSM_RAMD1
|
||||||
|
//!
|
||||||
|
//! This function returns the security zone a RAM section belongs to.
|
||||||
|
//!
|
||||||
|
//! \return Returns DCSM_MEMORY_INACCESSIBLE if the section is inaccessible,
|
||||||
|
//! DCSM_MEMORY_ZONE1 if the section belongs to zone 1, DCSM_MEMORY_ZONE2 if
|
||||||
|
//! the section belongs to zone 2 and DCSM_MEMORY_FULL_ACCESS if the section
|
||||||
|
//! doesn't belong to any zone (or if the section is unsecure).
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline DCSM_MemoryStatus
|
||||||
|
DCSM_getRAMZone(DCSM_RAMModule module)
|
||||||
|
{
|
||||||
|
uint16_t shift = (uint16_t)module * 2U;
|
||||||
|
uint32_t ramStatus;
|
||||||
|
//
|
||||||
|
//Read the RAMSTAT register for the specific RAM Module.
|
||||||
|
//
|
||||||
|
ramStatus = ((HWREG(DCSMCOMMON_BASE + DCSM_O_RAMSTAT) >>
|
||||||
|
shift) & 0x03U);
|
||||||
|
return((DCSM_MemoryStatus)ramStatus);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Returns the security zone a flash sector belongs to
|
||||||
|
//!
|
||||||
|
//! \param sector is the flash sector value. Use DCSM_Sector type.
|
||||||
|
//!
|
||||||
|
//! This function returns the security zone a flash sector belongs to.
|
||||||
|
//!
|
||||||
|
//! \return Returns DCSM_MEMORY_INACCESSIBLE if the section is inaccessible ,
|
||||||
|
//! DCSM_MEMORY_ZONE1 if the section belongs to zone 1, DCSM_MEMORY_ZONE2 if
|
||||||
|
//! the section belongs to zone 2 and DCSM_MEMORY_FULL_ACCESS if the section
|
||||||
|
//! doesn't belong to any zone (or if the section is unsecure)..
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline DCSM_MemoryStatus
|
||||||
|
DCSM_getFlashSectorZone(DCSM_Sector sector)
|
||||||
|
{
|
||||||
|
uint32_t sectStat;
|
||||||
|
uint16_t shift;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get the Sector status register for the specific bank
|
||||||
|
//
|
||||||
|
sectStat = HWREG(DCSMCOMMON_BASE + DCSM_O_SECTSTAT);
|
||||||
|
shift = (uint16_t)sector * 2U;
|
||||||
|
|
||||||
|
//
|
||||||
|
//Read the SECTSTAT register for the specific Flash Sector.
|
||||||
|
//
|
||||||
|
return((DCSM_MemoryStatus)((uint16_t)((sectStat >> shift) & 0x3U)));
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Read Zone 1 Link Pointer Error
|
||||||
|
//!
|
||||||
|
//! A non-zero value indicates an error on the bit position that is set to 1.
|
||||||
|
//!
|
||||||
|
//! \return Returns the value of the Zone 1 Link Pointer error.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline uint32_t
|
||||||
|
DCSM_getZone1LinkPointerError(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Return the LinkPointer Error for specific bank
|
||||||
|
//
|
||||||
|
return(HWREG(DCSM_Z1_BASE + DCSM_O_Z1_LINKPOINTERERR));
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Read Zone 2 Link Pointer Error
|
||||||
|
//!
|
||||||
|
//! A non-zero value indicates an error on the bit position that is set to 1.
|
||||||
|
//!
|
||||||
|
//! \return Returns the value of the Zone 2 Link Pointer error.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
static inline uint32_t
|
||||||
|
DCSM_getZone2LinkPointerError(void)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Return the LinkPointer Error for specific bank
|
||||||
|
//
|
||||||
|
return(HWREG(DCSM_Z2_BASE + DCSM_O_Z2_LINKPOINTERERR));
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Unlocks Zone 1 CSM.
|
||||||
|
//!
|
||||||
|
//! \param psCMDKey is a pointer to the DCSM_CSMPasswordKey struct that has the
|
||||||
|
//! CSM password for zone 1.
|
||||||
|
//!
|
||||||
|
//! This function unlocks the CSM password. It first reads the
|
||||||
|
//! four password locations in the User OTP. If any of the password values is
|
||||||
|
//! different from 0xFFFFFFFF, it unlocks the device by writing the provided
|
||||||
|
//! passwords into CSM Key registers
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//!
|
||||||
|
//! \note This function should not be called in an actual application,
|
||||||
|
//! should only be used for once to program the OTP memory. Ensure flash data
|
||||||
|
//! cache is disabled before calling this function(Flash_disableCache).
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void
|
||||||
|
DCSM_unlockZone1CSM(const DCSM_CSMPasswordKey * const psCMDKey);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Unlocks Zone 2 CSM.
|
||||||
|
//!
|
||||||
|
//! \param psCMDKey is a pointer to the CSMPSWDKEY that has the CSM
|
||||||
|
//! password for zone 2.
|
||||||
|
//!
|
||||||
|
//! This function unlocks the CSM password. It first reads
|
||||||
|
//! the four password locations in the User OTP. If any of the password values
|
||||||
|
//! is different from 0xFFFFFFFF, it unlocks the device by writing the
|
||||||
|
//! provided passwords into CSM Key registers
|
||||||
|
//!
|
||||||
|
//! \return None.
|
||||||
|
//!
|
||||||
|
//! \note This function should not be called in an actual application,
|
||||||
|
//! should only be used for once to program the OTP memory. Ensure flash data
|
||||||
|
//! cache is disabled before calling this function(Flash_disableCache).
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void
|
||||||
|
DCSM_unlockZone2CSM(const DCSM_CSMPasswordKey * const psCMDKey);
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Returns the EXE-ONLY status of zone 1 for a flash sector
|
||||||
|
//!
|
||||||
|
//! \param sector is the flash sector value. Use DCSM_Sector type.
|
||||||
|
//!
|
||||||
|
//! This function takes in a valid sector value and returns the status of EXE
|
||||||
|
//! ONLY security protection for the sector.
|
||||||
|
//!
|
||||||
|
//! \return Returns DCSM_PROTECTED if the sector is EXE-ONLY protected,
|
||||||
|
//! DCSM_UNPROTECTED if the sector is not EXE-ONLY protected,
|
||||||
|
//! DCSM_INCORRECT_ZONE if sector does not belong to this zone.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern DCSM_EXEOnlyStatus
|
||||||
|
DCSM_getZone1FlashEXEStatus(DCSM_Sector sector);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Returns the EXE-ONLY status of zone 1 for a RAM module
|
||||||
|
//!
|
||||||
|
//! \param module is the RAM module value. Valid values are type DCSM_RAMModule
|
||||||
|
//! C28x RAMs :
|
||||||
|
//! - \b DCSM_RAMLS0
|
||||||
|
//! - \b DCSM_RAMLS1
|
||||||
|
//! - \b DCSM_RAMLS2
|
||||||
|
//! - \b DCSM_RAMLS3
|
||||||
|
//! - \b DCSM_RAMLS4
|
||||||
|
//! - \b DCSM_RAMLS5
|
||||||
|
//! - \b DCSM_RAMD0
|
||||||
|
//! - \b DCSM_RAMD1
|
||||||
|
//!
|
||||||
|
//! This function takes in a valid module value and returns the status of EXE
|
||||||
|
//! ONLY security protection for that module. DCSM_CLA is an invalid module
|
||||||
|
//! value. There is no EXE-ONLY available for DCSM_CLA.
|
||||||
|
//!
|
||||||
|
//! \return Returns DCSM_PROTECTED if the module is EXE-ONLY protected,
|
||||||
|
//! DCSM_UNPROTECTED if the module is not EXE-ONLY protected,
|
||||||
|
//! DCSM_INCORRECT_ZONE if module does not belong to this zone.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern DCSM_EXEOnlyStatus
|
||||||
|
DCSM_getZone1RAMEXEStatus(DCSM_RAMModule module);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Returns the EXE-ONLY status of zone 2 for a flash sector
|
||||||
|
//!
|
||||||
|
//! \param sector is the flash sector value. Use DCSM_Sector type.
|
||||||
|
//!
|
||||||
|
//! This function takes in a valid sector value and returns the status of EXE
|
||||||
|
//! ONLY security protection for the sector.
|
||||||
|
//!
|
||||||
|
//! \return Returns DCSM_PROTECTED if the sector is EXE-ONLY protected,
|
||||||
|
//! DCSM_UNPROTECTED if the sector is not EXE-ONLY protected,
|
||||||
|
//! DCSM_INCORRECT_ZONE if sector does not belong to this zone.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern DCSM_EXEOnlyStatus
|
||||||
|
DCSM_getZone2FlashEXEStatus(DCSM_Sector sector);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Returns the EXE-ONLY status of zone 2 for a RAM module
|
||||||
|
//!
|
||||||
|
//! \param module is the RAM module value. Valid values are type DCSM_RAMModule
|
||||||
|
//! C28x RAMs :
|
||||||
|
//! - \b DCSM_RAMLS0
|
||||||
|
//! - \b DCSM_RAMLS1
|
||||||
|
//! - \b DCSM_RAMLS2
|
||||||
|
//! - \b DCSM_RAMLS3
|
||||||
|
//! - \b DCSM_RAMLS4
|
||||||
|
//! - \b DCSM_RAMLS5
|
||||||
|
//! - \b DCSM_RAMD0
|
||||||
|
//! - \b DCSM_RAMD1
|
||||||
|
//!
|
||||||
|
//! This function takes in a valid module value and returns the status of EXE
|
||||||
|
//! ONLY security protection for that module. DCSM_CLA is an invalid module
|
||||||
|
//! value. There is no EXE-ONLY available for DCSM_CLA.
|
||||||
|
//!
|
||||||
|
//! \return Returns DCSM_PROTECTED if the module is EXE-ONLY protected,
|
||||||
|
//! DCSM_UNPROTECTED if the module is not EXE-ONLY protected,
|
||||||
|
//! DCSM_INCORRECT_ZONE if module does not belong to this zone.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern DCSM_EXEOnlyStatus
|
||||||
|
DCSM_getZone2RAMEXEStatus(DCSM_RAMModule module);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Claims the zone semaphore which allows access to the Flash Wrapper register
|
||||||
|
//! for that zone.
|
||||||
|
//!
|
||||||
|
//! \param zone is the zone which is trying to claim the semaphore which allows
|
||||||
|
//! access to the Flash Wrapper registers.
|
||||||
|
//!
|
||||||
|
//! \return Returns true for a successful semaphore capture, false if it was
|
||||||
|
//! unable to capture the semaphore.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern bool
|
||||||
|
DCSM_claimZoneSemaphore(DCSM_SemaphoreZone zone);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
//! Releases the zone semaphore.
|
||||||
|
//!
|
||||||
|
//! \return Returns true if it was successful in releasing the zone semaphore
|
||||||
|
//! and false if it was unsuccessful in releasing the zone semaphore.
|
||||||
|
//!
|
||||||
|
//! \note If the calling function is not in the right zone to be able
|
||||||
|
//! to access this register, it will return a false.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern bool
|
||||||
|
DCSM_releaseZoneSemaphore(void);
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Close the Doxygen group.
|
||||||
|
//! @}
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Mark the end of the C bindings section for C++ compilers.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // DCSM_H
|
||||||
@ -0,0 +1,91 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: debug.h
|
||||||
|
//
|
||||||
|
// TITLE: Assert definition macro for debug.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#ifndef DEBUG_H
|
||||||
|
#define DEBUG_H
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Prototype for the function that is called when an invalid argument is passed
|
||||||
|
// to an API. This is only used when doing a DEBUG build. It is the
|
||||||
|
// application's responsibility to define the __error__ function.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
extern void __error__(const char *filename, uint32_t line);
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// The ASSERT macro, which does the actual assertion checking. Typically, this
|
||||||
|
// will be for procedure arguments.
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef DEBUG
|
||||||
|
#ifdef __TMS320C28XX__
|
||||||
|
//
|
||||||
|
// When called from C28x application
|
||||||
|
//
|
||||||
|
#define ASSERT(expr) do \
|
||||||
|
{ \
|
||||||
|
if(!(expr)) \
|
||||||
|
{ \
|
||||||
|
__error__(__FILE__, __LINE__); \
|
||||||
|
} \
|
||||||
|
} \
|
||||||
|
while((_Bool)0)
|
||||||
|
#else
|
||||||
|
//
|
||||||
|
// When called from CLA application. Update as needed.
|
||||||
|
//
|
||||||
|
#define ASSERT(expr) do \
|
||||||
|
{ \
|
||||||
|
if(!(expr)) \
|
||||||
|
{ \
|
||||||
|
__mdebugstop(); \
|
||||||
|
} \
|
||||||
|
} \
|
||||||
|
while((_Bool)0)
|
||||||
|
#endif
|
||||||
|
#else
|
||||||
|
#define ASSERT(expr)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // DEBUG_H
|
||||||
@ -0,0 +1,370 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: dma.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x DMA driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "dma.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DMA_configAddresses
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void DMA_configAddresses(uint32_t base, const void *destAddr,
|
||||||
|
const void *srcAddr)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DMA_isBaseValid(base));
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set up SOURCE address.
|
||||||
|
//
|
||||||
|
HWREG(base + DMA_O_SRC_BEG_ADDR_SHADOW) = (uint32_t)srcAddr;
|
||||||
|
HWREG(base + DMA_O_SRC_ADDR_SHADOW) = (uint32_t)srcAddr;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set up DESTINATION address.
|
||||||
|
//
|
||||||
|
HWREG(base + DMA_O_DST_BEG_ADDR_SHADOW) = (uint32_t)destAddr;
|
||||||
|
HWREG(base + DMA_O_DST_ADDR_SHADOW) = (uint32_t)destAddr;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DMA_configBurst
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void DMA_configBurst(uint32_t base, uint16_t size, int16_t srcStep,
|
||||||
|
int16_t destStep)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DMA_isBaseValid(base));
|
||||||
|
ASSERT((size >= 1U) && (size <= 32U));
|
||||||
|
ASSERT(((srcStep >= -4096) && (srcStep <= 4095)) &&
|
||||||
|
((destStep >= -4096) && (destStep <= 4095)));
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set up BURST registers.
|
||||||
|
//
|
||||||
|
HWREGH(base + DMA_O_BURST_SIZE) = size - 1U;
|
||||||
|
HWREGH(base + DMA_O_SRC_BURST_STEP) = srcStep;
|
||||||
|
HWREGH(base + DMA_O_DST_BURST_STEP) = destStep;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DMA_configTransfer
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void DMA_configTransfer(uint32_t base, uint32_t transferSize, int16_t srcStep,
|
||||||
|
int16_t destStep)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DMA_isBaseValid(base));
|
||||||
|
ASSERT(transferSize <= 0x10000U);
|
||||||
|
ASSERT(((srcStep >= -4096) && (srcStep <= 4095)) &&
|
||||||
|
((destStep >= -4096) && (destStep <= 4095)));
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set up TRANSFER registers.
|
||||||
|
//
|
||||||
|
HWREGH(base + DMA_O_TRANSFER_SIZE) = (uint16_t)(transferSize - 1U);
|
||||||
|
HWREGH(base + DMA_O_SRC_TRANSFER_STEP) = srcStep;
|
||||||
|
HWREGH(base + DMA_O_DST_TRANSFER_STEP) = destStep;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DMA_configWrap
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void DMA_configWrap(uint32_t base, uint32_t srcWrapSize, int16_t srcStep,
|
||||||
|
uint32_t destWrapSize, int16_t destStep)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DMA_isBaseValid(base));
|
||||||
|
ASSERT((srcWrapSize <= 0x10000U) || (destWrapSize <= 0x10000U));
|
||||||
|
ASSERT(((srcStep >= -4096) && (srcStep <= 4095)) &&
|
||||||
|
((destStep >= -4096) && (destStep <= 4095)));
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set up WRAP registers.
|
||||||
|
//
|
||||||
|
HWREGH(base + DMA_O_SRC_WRAP_SIZE) = (uint16_t)(srcWrapSize - 1U);
|
||||||
|
HWREGH(base + DMA_O_SRC_WRAP_STEP) = srcStep;
|
||||||
|
|
||||||
|
HWREGH(base + DMA_O_DST_WRAP_SIZE) = (uint16_t)(destWrapSize - 1U);
|
||||||
|
HWREGH(base + DMA_O_DST_WRAP_STEP) = destStep;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DMA_configMode
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void DMA_configMode(uint32_t base, DMA_Trigger trigger, uint32_t config)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DMA_isBaseValid(base));
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set up trigger selection in the CMA/CLA trigger source selection
|
||||||
|
// registers. These are considered part of system control.
|
||||||
|
//
|
||||||
|
switch(base)
|
||||||
|
{
|
||||||
|
case DMA_CH1_BASE:
|
||||||
|
//
|
||||||
|
// Channel 1
|
||||||
|
//
|
||||||
|
HWREG(DMACLASRCSEL_BASE + SYSCTL_O_DMACHSRCSEL1) =
|
||||||
|
(HWREG(DMACLASRCSEL_BASE + SYSCTL_O_DMACHSRCSEL1) &
|
||||||
|
~((uint32_t)SYSCTL_DMACHSRCSEL1_CH1_M)) |
|
||||||
|
((uint32_t)trigger << SYSCTL_DMACHSRCSEL1_CH1_S);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set peripheral interrupt select bits to the channel number.
|
||||||
|
//
|
||||||
|
HWREGH(DMA_CH1_BASE + DMA_O_MODE) =
|
||||||
|
(HWREGH(DMA_CH1_BASE + DMA_O_MODE) & ~DMA_MODE_PERINTSEL_M) | 1U;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case DMA_CH2_BASE:
|
||||||
|
//
|
||||||
|
// Channel 2
|
||||||
|
//
|
||||||
|
HWREG(DMACLASRCSEL_BASE + SYSCTL_O_DMACHSRCSEL1) =
|
||||||
|
(HWREG(DMACLASRCSEL_BASE + SYSCTL_O_DMACHSRCSEL1) &
|
||||||
|
~((uint32_t)SYSCTL_DMACHSRCSEL1_CH2_M)) |
|
||||||
|
((uint32_t)trigger << SYSCTL_DMACHSRCSEL1_CH2_S);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set peripheral interrupt select bits to the channel number.
|
||||||
|
//
|
||||||
|
HWREGH(DMA_CH2_BASE + DMA_O_MODE) =
|
||||||
|
(HWREGH(DMA_CH2_BASE + DMA_O_MODE) & ~DMA_MODE_PERINTSEL_M) | 2U;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case DMA_CH3_BASE:
|
||||||
|
//
|
||||||
|
// Channel 3
|
||||||
|
//
|
||||||
|
HWREG(DMACLASRCSEL_BASE + SYSCTL_O_DMACHSRCSEL1) =
|
||||||
|
(HWREG(DMACLASRCSEL_BASE + SYSCTL_O_DMACHSRCSEL1) &
|
||||||
|
~((uint32_t)SYSCTL_DMACHSRCSEL1_CH3_M)) |
|
||||||
|
((uint32_t)trigger << SYSCTL_DMACHSRCSEL1_CH3_S);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set peripheral interrupt select bits to the channel number.
|
||||||
|
//
|
||||||
|
HWREGH(DMA_CH3_BASE + DMA_O_MODE) =
|
||||||
|
(HWREGH(DMA_CH3_BASE + DMA_O_MODE) & ~DMA_MODE_PERINTSEL_M) | 3U;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case DMA_CH4_BASE:
|
||||||
|
//
|
||||||
|
// Channel 4
|
||||||
|
//
|
||||||
|
HWREG(DMACLASRCSEL_BASE + SYSCTL_O_DMACHSRCSEL1) =
|
||||||
|
(HWREG(DMACLASRCSEL_BASE + SYSCTL_O_DMACHSRCSEL1) &
|
||||||
|
~((uint32_t)SYSCTL_DMACHSRCSEL1_CH4_M)) |
|
||||||
|
((uint32_t)trigger << SYSCTL_DMACHSRCSEL1_CH4_S);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set peripheral interrupt select bits to the channel number.
|
||||||
|
//
|
||||||
|
HWREGH(DMA_CH4_BASE + DMA_O_MODE) =
|
||||||
|
(HWREGH(DMA_CH4_BASE + DMA_O_MODE) & ~DMA_MODE_PERINTSEL_M) | 4U;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case DMA_CH5_BASE:
|
||||||
|
//
|
||||||
|
// Channel 5
|
||||||
|
//
|
||||||
|
HWREG(DMACLASRCSEL_BASE + SYSCTL_O_DMACHSRCSEL2) =
|
||||||
|
(HWREG(DMACLASRCSEL_BASE + SYSCTL_O_DMACHSRCSEL2) &
|
||||||
|
~((uint32_t)SYSCTL_DMACHSRCSEL2_CH5_M)) |
|
||||||
|
((uint32_t)trigger << SYSCTL_DMACHSRCSEL2_CH5_S);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set peripheral interrupt select bits to the channel number.
|
||||||
|
//
|
||||||
|
HWREGH(DMA_CH5_BASE + DMA_O_MODE) =
|
||||||
|
(HWREGH(DMA_CH5_BASE + DMA_O_MODE) & ~DMA_MODE_PERINTSEL_M) | 5U;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case DMA_CH6_BASE:
|
||||||
|
//
|
||||||
|
// Channel 6
|
||||||
|
//
|
||||||
|
HWREG(DMACLASRCSEL_BASE + SYSCTL_O_DMACHSRCSEL2) =
|
||||||
|
(HWREG(DMACLASRCSEL_BASE + SYSCTL_O_DMACHSRCSEL2) &
|
||||||
|
~((uint32_t)SYSCTL_DMACHSRCSEL2_CH6_M)) |
|
||||||
|
((uint32_t)trigger << SYSCTL_DMACHSRCSEL2_CH6_S);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set peripheral interrupt select bits to the channel number.
|
||||||
|
//
|
||||||
|
HWREGH(DMA_CH6_BASE + DMA_O_MODE) =
|
||||||
|
(HWREGH(DMA_CH6_BASE + DMA_O_MODE) & ~DMA_MODE_PERINTSEL_M) | 6U;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
//
|
||||||
|
// Invalid base.
|
||||||
|
//
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write the configuration to the mode register.
|
||||||
|
//
|
||||||
|
HWREGH(base + DMA_O_MODE) &= ~(DMA_MODE_DATASIZE | DMA_MODE_CONTINUOUS |
|
||||||
|
DMA_MODE_ONESHOT);
|
||||||
|
HWREGH(base + DMA_O_MODE) |= config;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// DMA_configChannel
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void DMA_configChannel(uint32_t base, const DMA_ConfigParams *transfParams)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(DMA_isBaseValid(base));
|
||||||
|
ASSERT(((transfParams->configSize == DMA_CFG_SIZE_16BIT) ||
|
||||||
|
(transfParams->configSize == DMA_CFG_SIZE_32BIT)) &&
|
||||||
|
((transfParams->transferMode == DMA_CFG_ONESHOT_DISABLE) ||
|
||||||
|
(transfParams->transferMode == DMA_CFG_ONESHOT_ENABLE)) &&
|
||||||
|
((transfParams->reinitMode == DMA_CFG_CONTINUOUS_DISABLE) ||
|
||||||
|
(transfParams->reinitMode == DMA_CFG_CONTINUOUS_ENABLE)));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure DMA Channel
|
||||||
|
//
|
||||||
|
DMA_configAddresses(base, (const void *)transfParams->destAddr,
|
||||||
|
(const void *)transfParams->srcAddr);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure the size of each burst and the address step size
|
||||||
|
//
|
||||||
|
DMA_configBurst(base, transfParams->burstSize, transfParams->srcBurstStep,
|
||||||
|
transfParams->destBurstStep);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure the transfer size and the address step that is
|
||||||
|
// made after each burst.
|
||||||
|
//
|
||||||
|
DMA_configTransfer(base, transfParams->transferSize,
|
||||||
|
transfParams->srcTransferStep,
|
||||||
|
transfParams->destTransferStep);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure the DMA channel's wrap settings
|
||||||
|
//
|
||||||
|
DMA_configWrap(base, transfParams->srcWrapSize, transfParams->srcWrapStep,
|
||||||
|
transfParams->destWrapSize, transfParams->destWrapStep);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure the DMA channel's trigger and mode
|
||||||
|
//
|
||||||
|
DMA_configMode(base, transfParams->transferTrigger,
|
||||||
|
transfParams->transferMode | transfParams->reinitMode |
|
||||||
|
transfParams->configSize);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable the selected peripheral trigger to start a DMA transfer
|
||||||
|
//
|
||||||
|
DMA_enableTrigger(base);
|
||||||
|
|
||||||
|
if(transfParams->enableInterrupt)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Set the channel interrupt mode
|
||||||
|
//
|
||||||
|
DMA_setInterruptMode(base, transfParams->interruptMode);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable the indicated DMA channel interrupt source
|
||||||
|
//
|
||||||
|
DMA_enableInterrupt(base);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable the indicated DMA channel interrupt source
|
||||||
|
//
|
||||||
|
DMA_disableInterrupt(base);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,109 @@
|
|||||||
|
#ifndef DRIVER_INCLUSIVE_TERMINOLOGY_MAPPING_H_
|
||||||
|
#define DRIVER_INCLUSIVE_TERMINOLOGY_MAPPING_H_
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// CLB
|
||||||
|
//*****************************************************************************
|
||||||
|
#define CLB_LOCAL_IN_MUX_SPISIMO_SLAVE CLB_LOCAL_IN_MUX_SPIPICO_PERIPHERAL
|
||||||
|
#define CLB_LOCAL_IN_MUX_SPISIMO_MASTER CLB_LOCAL_IN_MUX_SPIPICO_CONTROLLER
|
||||||
|
#define CLB_GLOBAL_IN_MUX_SPI1_SPISOMI_MASTER CLB_GLOBAL_IN_MUX_SPI1_SPIPOCI_CONTROLLER
|
||||||
|
#define CLB_GLOBAL_IN_MUX_SPI1_SPISTE CLB_GLOBAL_IN_MUX_SPI1_SPIPTE
|
||||||
|
#define CLB_GLOBAL_IN_MUX_SPI2_SPISOMI_MASTER CLB_GLOBAL_IN_MUX_SPI2_SPIPOCI_CONTROLLER
|
||||||
|
#define CLB_GLOBAL_IN_MUX_SPI2_SPISTE CLB_GLOBAL_IN_MUX_SPI2_SPIPTE
|
||||||
|
#define CLB_GLOBAL_IN_MUX_SPI3_SPISOMI_MASTER CLB_GLOBAL_IN_MUX_SPI3_SPIPOCI_CONTROLLER
|
||||||
|
#define CLB_GLOBAL_IN_MUX_SPI3_SPISTE CLB_GLOBAL_IN_MUX_SPI3_SPIPTE
|
||||||
|
#define CLB_GLOBAL_IN_MUX_SPI4_SPISOMI_MASTER CLB_GLOBAL_IN_MUX_SPI4_SPIPOCI_CONTROLLER
|
||||||
|
#define CLB_GLOBAL_IN_MUX_SPI4_SPISTE CLB_GLOBAL_IN_MUX_SPI4_SPIPTE
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// SPI
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SPI_MODE_SLAVE SPI_MODE_PERIPHERAL
|
||||||
|
#define SPI_MODE_MASTER SPI_MODE_CONTROLLER
|
||||||
|
#define SPI_MODE_SLAVE_OD SPI_MODE_PERIPHERAL_OD
|
||||||
|
#define SPI_MODE_MASTER_OD SPI_MODE_CONTROLLER_OD
|
||||||
|
|
||||||
|
#define SPI_STE_ACTIVE_LOW SPI_PTE_ACTIVE_LOW
|
||||||
|
#define SPI_STE_ACTIVE_HIGH SPI_PTE_ACTIVE_HIGH
|
||||||
|
|
||||||
|
#define SPI_setSTESignalPolarity SPI_setPTESignalPolarity
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// Interrupt
|
||||||
|
//*****************************************************************************
|
||||||
|
#define Interrupt_enableMaster Interrupt_enableGlobal
|
||||||
|
#define Interrupt_disableMaster Interrupt_disableGlobal
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// SysCtrl
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SysCtl_AccessMaster SysCtl_AccessController
|
||||||
|
#define SYSCTL_SEC_MASTER_CLA SYSCTL_SEC_CONTROLLER_CLA
|
||||||
|
#define SYSCTL_SEC_MASTER_DMA SYSCTL_SEC_CONTROLLER_DMA
|
||||||
|
#define SysCtl_selectSecMaster SysCtl_selectSecController
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// GPIO
|
||||||
|
//*****************************************************************************
|
||||||
|
#define GPIO_setMasterCore GPIO_setControllerCore
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// Memcfg
|
||||||
|
//*****************************************************************************
|
||||||
|
#define MemCfg_LSRAMMMasterSel MemCfg_LSRAMMControllerSel
|
||||||
|
#define MEMCFG_LSRAMMASTER_CPU_ONLY MEMCFG_LSRAMCONTROLLER_CPU_ONLY
|
||||||
|
#define MEMCFG_LSRAMMASTER_CPU_CLA1 MEMCFG_LSRAMCONTROLLER_CPU_CLA1
|
||||||
|
#define MemCfg_setLSRAMMasterSel MemCfg_setLSRAMControllerSel
|
||||||
|
|
||||||
|
#define MemCfg_GSRAMMasterSel MemCfg_GSRAMControllerSel
|
||||||
|
#define MEMCFG_GSRAMMASTER_CPU1 MEMCFG_GSRAMCONTROLLER_CPU1
|
||||||
|
#define MEMCFG_GSRAMMASTER_CPU2 MEMCFG_GSRAMCONTROLLER_CPU2
|
||||||
|
#define MemCfg_setGSRAMMasterSel MemCfg_setGSRAMControllerSel
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// EMIF
|
||||||
|
//*****************************************************************************
|
||||||
|
#define EMIF_MasterSelect EMIF_ControllerSelect
|
||||||
|
#define EMIF_selectMaster EMIF_selectController
|
||||||
|
#define EMIF_MASTER_CPU1_NG EMIF_CONTROLLER_CPU1_NG
|
||||||
|
#define EMIF_MASTER_CPU1_G EMIF_CONTROLLER_CPU1_G
|
||||||
|
#define EMIF_MASTER_CPU2_G EMIF_CONTROLLER_CPU2_G
|
||||||
|
#define EMIF_MASTER_CPU1_NG2 EMIF_CONTROLLER_CPU1_NG2
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// I2C
|
||||||
|
//*****************************************************************************
|
||||||
|
#define I2C_MASTER_SEND_MODE I2C_CONTROLLER_SEND_MODE
|
||||||
|
#define I2C_MASTER_RECEIVE_MODE I2C_CONTROLLER_RECEIVE_MODE
|
||||||
|
#define I2C_SLAVE_SEND_MODE I2C_TARGET_SEND_MODE
|
||||||
|
#define I2C_SLAVE_RECEIVE_MODE I2C_TARGET_RECEIVE_MODE
|
||||||
|
#define I2C_INT_ADDR_SLAVE I2C_INT_ADDR_TARGET
|
||||||
|
#define I2C_STS_ADDR_SLAVE I2C_STS_ADDR_TARGET
|
||||||
|
#define I2C_STS_SLAVE_DIR I2C_STS_TARGET_DIR
|
||||||
|
#define I2C_INTSRC_ADDR_SLAVE I2C_INTSRC_ADDR_TARGET
|
||||||
|
|
||||||
|
#define I2C_initMaster I2C_initController
|
||||||
|
#define I2C_setSlaveAddress I2C_setTargetAddress
|
||||||
|
#define I2C_setOwnSlaveAddress I2C_setOwnAddress
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// SDFM
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SDFM_enableMasterInterrupt SDFM_enableMainInterrupt
|
||||||
|
#define SDFM_disableMasterInterrupt SDFM_disableMainInterrupt
|
||||||
|
#define SDFM_enableMasterFilter SDFM_enableMainFilter
|
||||||
|
#define SDFM_disableMasterFilter SDFM_disableMainFilter
|
||||||
|
|
||||||
|
#define SDFM_MASTER_INTERRUPT_FLAG SDFM_MAIN_INTERRUPT_FLAG
|
||||||
|
|
||||||
|
#endif /* DRIVER_INCLUSIVE_TERMINOLOGY_MAPPING_H_ */
|
||||||
@ -0,0 +1,61 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: ecap.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x ECAP driver
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "ecap.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// ECAP_setEmulationMode
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void ECAP_setEmulationMode(uint32_t base, ECAP_EmulationMode mode)
|
||||||
|
{
|
||||||
|
ASSERT(ECAP_isBaseValid(base));
|
||||||
|
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write to FREE/SOFT bit
|
||||||
|
//
|
||||||
|
HWREGH(base + ECAP_O_ECCTL1) =
|
||||||
|
((HWREGH(base + ECAP_O_ECCTL1) & (~ECAP_ECCTL1_FREE_SOFT_M)) |
|
||||||
|
((uint16_t)mode << ECAP_ECCTL1_FREE_SOFT_S));
|
||||||
|
}
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,46 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: emif.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x EMIF driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include <stdbool.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "emif.h"
|
||||||
|
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,363 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: epwm.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x EPWM driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "epwm.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// EPWM_setEmulationMode
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void EPWM_setEmulationMode(uint32_t base, EPWM_EmulationMode emulationMode)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(EPWM_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write to FREE_SOFT bits
|
||||||
|
//
|
||||||
|
HWREGH(base + EPWM_O_TBCTL) =
|
||||||
|
((HWREGH(base + EPWM_O_TBCTL) & (~EPWM_TBCTL_FREE_SOFT_M)) |
|
||||||
|
((uint16_t)emulationMode << EPWM_TBCTL_FREE_SOFT_S));
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// EPWM_configureSignal
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void EPWM_configureSignal(uint32_t base, const EPWM_SignalParams *signalParams)
|
||||||
|
{
|
||||||
|
float32_t tbClkInHz = 0.0F;
|
||||||
|
uint16_t tbPrdVal = 0U, cmpAVal = 0U, cmpBVal = 0U;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(EPWM_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Valid values in the function for TBCTR Mode are UP, DOWN
|
||||||
|
// and UP-DOWN count.
|
||||||
|
//
|
||||||
|
ASSERT((uint16_t)signalParams->tbCtrMode <= 2U);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure EPWM clock Divider
|
||||||
|
//
|
||||||
|
SysCtl_setEPWMClockDivider(signalParams->epwmClkDiv);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure Time Base counter Clock
|
||||||
|
//
|
||||||
|
EPWM_setClockPrescaler(base, signalParams->tbClkDiv,
|
||||||
|
signalParams->tbHSClkDiv);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure Time Base Counter Mode
|
||||||
|
//
|
||||||
|
EPWM_setTimeBaseCounterMode(base, signalParams->tbCtrMode);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Calculate TBCLK, TBPRD and CMPx values to be configured for
|
||||||
|
// achieving desired signal
|
||||||
|
//
|
||||||
|
tbClkInHz = ((float32_t)signalParams->sysClkInHz /
|
||||||
|
(float32_t)(1U << ((uint16_t)signalParams->epwmClkDiv +
|
||||||
|
(uint16_t)signalParams->tbClkDiv)));
|
||||||
|
|
||||||
|
if(signalParams->tbHSClkDiv <= EPWM_HSCLOCK_DIVIDER_4)
|
||||||
|
{
|
||||||
|
tbClkInHz /= (float32_t)(1U << (uint16_t)signalParams->tbHSClkDiv);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
tbClkInHz /= (float32_t)(2U * (uint16_t)signalParams->tbHSClkDiv);
|
||||||
|
}
|
||||||
|
|
||||||
|
if(signalParams->tbCtrMode == EPWM_COUNTER_MODE_UP)
|
||||||
|
{
|
||||||
|
tbPrdVal = (uint16_t)((tbClkInHz / signalParams->freqInHz) - 1.0f);
|
||||||
|
cmpAVal = (uint16_t)(signalParams->dutyValA *
|
||||||
|
(float32_t)(tbPrdVal + 1U));
|
||||||
|
cmpBVal = (uint16_t)(signalParams->dutyValB *
|
||||||
|
(float32_t)(tbPrdVal + 1U));
|
||||||
|
}
|
||||||
|
else if(signalParams->tbCtrMode == EPWM_COUNTER_MODE_DOWN)
|
||||||
|
{
|
||||||
|
tbPrdVal = (uint16_t)((tbClkInHz / signalParams->freqInHz) - 1.0f);
|
||||||
|
cmpAVal = (uint16_t)((float32_t)(tbPrdVal + 1U) -
|
||||||
|
(signalParams->dutyValA * (float32_t)(tbPrdVal + 1U)));
|
||||||
|
cmpBVal = (uint16_t)((float32_t)(tbPrdVal + 1U) -
|
||||||
|
(signalParams->dutyValB * (float32_t)(tbPrdVal + 1U)));
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
tbPrdVal = (uint16_t)(tbClkInHz / (2.0f * signalParams->freqInHz));
|
||||||
|
cmpAVal = (uint16_t)(((float32_t)tbPrdVal -
|
||||||
|
((signalParams->dutyValA *
|
||||||
|
(float32_t)tbPrdVal))) + 0.5f);
|
||||||
|
cmpBVal = (uint16_t)(((float32_t)tbPrdVal -
|
||||||
|
((signalParams->dutyValB *
|
||||||
|
(float32_t)tbPrdVal))) + 0.5f);
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure TBPRD value
|
||||||
|
//
|
||||||
|
EPWM_setTimeBasePeriod(base, tbPrdVal);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Default Configurations.
|
||||||
|
//
|
||||||
|
EPWM_disablePhaseShiftLoad(base);
|
||||||
|
EPWM_setPhaseShift(base, 0U);
|
||||||
|
EPWM_setTimeBaseCounter(base, 0U);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Setup shadow register load on ZERO
|
||||||
|
//
|
||||||
|
EPWM_setCounterCompareShadowLoadMode(base,
|
||||||
|
EPWM_COUNTER_COMPARE_A,
|
||||||
|
EPWM_COMP_LOAD_ON_CNTR_ZERO);
|
||||||
|
EPWM_setCounterCompareShadowLoadMode(base,
|
||||||
|
EPWM_COUNTER_COMPARE_B,
|
||||||
|
EPWM_COMP_LOAD_ON_CNTR_ZERO);
|
||||||
|
//
|
||||||
|
// Set Compare values
|
||||||
|
//
|
||||||
|
EPWM_setCounterCompareValue(base, EPWM_COUNTER_COMPARE_A,
|
||||||
|
cmpAVal);
|
||||||
|
EPWM_setCounterCompareValue(base, EPWM_COUNTER_COMPARE_B,
|
||||||
|
cmpBVal);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set actions for ePWMxA & ePWMxB
|
||||||
|
//
|
||||||
|
if(signalParams->tbCtrMode == EPWM_COUNTER_MODE_UP)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Set PWMxA on Zero
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_A,
|
||||||
|
EPWM_AQ_OUTPUT_HIGH,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear PWMxA on event A, up count
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_A,
|
||||||
|
EPWM_AQ_OUTPUT_LOW,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
|
||||||
|
|
||||||
|
if(signalParams->invertSignalB == true)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Clear PWMxB on Zero
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_LOW,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
|
||||||
|
//
|
||||||
|
// Set PWMxB on event B, up count
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_HIGH,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Set PWMxB on Zero
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_HIGH,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
|
||||||
|
//
|
||||||
|
// Clear PWMxB on event B, up count
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_LOW,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);
|
||||||
|
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else if((signalParams->tbCtrMode == EPWM_COUNTER_MODE_DOWN))
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Set PWMxA on Zero
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_A,
|
||||||
|
EPWM_AQ_OUTPUT_HIGH,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear PWMxA on event A, down count
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_A,
|
||||||
|
EPWM_AQ_OUTPUT_LOW,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);
|
||||||
|
|
||||||
|
if(signalParams->invertSignalB == true)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Clear PWMxB on Zero
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_LOW,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
|
||||||
|
//
|
||||||
|
// Set PWMxB on event B, down count
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_HIGH,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Set PWMxB on Zero
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_HIGH,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
|
||||||
|
//
|
||||||
|
// Clear PWMxB on event B, down count
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_LOW,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Clear PWMxA on Zero
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_A,
|
||||||
|
EPWM_AQ_OUTPUT_LOW,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set PWMxA on event A, up count
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_A,
|
||||||
|
EPWM_AQ_OUTPUT_HIGH,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear PWMxA on event A, down count
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_A,
|
||||||
|
EPWM_AQ_OUTPUT_LOW,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);
|
||||||
|
|
||||||
|
if(signalParams->invertSignalB == true)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Set PWMxB on Zero
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_HIGH,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear PWMxB on event B, up count
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_LOW,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);
|
||||||
|
//
|
||||||
|
// Set PWMxB on event B, down count
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_HIGH,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Clear PWMxB on Zero
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_LOW,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set PWMxB on event B, up count
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_HIGH,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPB);
|
||||||
|
//
|
||||||
|
// Clear PWMxB on event B, down count
|
||||||
|
//
|
||||||
|
EPWM_setActionQualifierAction(base,
|
||||||
|
EPWM_AQ_OUTPUT_B,
|
||||||
|
EPWM_AQ_OUTPUT_LOW,
|
||||||
|
EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPB);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,149 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: eqep.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x eQEP driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "eqep.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// EQEP_setCompareConfig
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
EQEP_setCompareConfig(uint32_t base, uint16_t config, uint32_t compareValue,
|
||||||
|
uint16_t cycles)
|
||||||
|
{
|
||||||
|
uint16_t regValue;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(EQEP_isBaseValid(base));
|
||||||
|
ASSERT(cycles <= (EQEP_QPOSCTL_PCSPW_M + 1U));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the compare match value
|
||||||
|
//
|
||||||
|
HWREG(base + EQEP_O_QPOSCMP) = compareValue;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the shadow register settings and pulse width.
|
||||||
|
//
|
||||||
|
regValue = (config & (uint16_t)(EQEP_QPOSCTL_PCSHDW |
|
||||||
|
EQEP_QPOSCTL_PCLOAD)) | (cycles - 1U);
|
||||||
|
|
||||||
|
HWREGH(base + EQEP_O_QPOSCTL) = (HWREGH(base + EQEP_O_QPOSCTL) &
|
||||||
|
~(EQEP_QPOSCTL_PCSPW_M |
|
||||||
|
EQEP_QPOSCTL_PCLOAD |
|
||||||
|
EQEP_QPOSCTL_PCSHDW)) | regValue;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set position compare sync-output mode.
|
||||||
|
//
|
||||||
|
regValue = config & (uint16_t)(EQEP_QDECCTL_SOEN | EQEP_QDECCTL_SPSEL);
|
||||||
|
|
||||||
|
HWREGH(base + EQEP_O_QDECCTL) = (HWREGH(base + EQEP_O_QDECCTL) &
|
||||||
|
~(EQEP_QDECCTL_SOEN |
|
||||||
|
EQEP_QDECCTL_SPSEL)) | regValue;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// EQEP_setInputPolarity
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
EQEP_setInputPolarity(uint32_t base, bool invertQEPA, bool invertQEPB,
|
||||||
|
bool invertIndex, bool invertStrobe)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(EQEP_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure QEPA signal
|
||||||
|
//
|
||||||
|
if(invertQEPA)
|
||||||
|
{
|
||||||
|
HWREGH(base + EQEP_O_QDECCTL) |= EQEP_QDECCTL_QAP;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
HWREGH(base + EQEP_O_QDECCTL) &= ~EQEP_QDECCTL_QAP;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure QEPB signal
|
||||||
|
//
|
||||||
|
if(invertQEPB)
|
||||||
|
{
|
||||||
|
HWREGH(base + EQEP_O_QDECCTL) |= EQEP_QDECCTL_QBP;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
HWREGH(base + EQEP_O_QDECCTL) &= ~EQEP_QDECCTL_QBP;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure index signal
|
||||||
|
//
|
||||||
|
if(invertIndex)
|
||||||
|
{
|
||||||
|
HWREGH(base + EQEP_O_QDECCTL) |= EQEP_QDECCTL_QIP;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
HWREGH(base + EQEP_O_QDECCTL) &= ~EQEP_QDECCTL_QIP;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Configure strobe signal
|
||||||
|
//
|
||||||
|
if(invertStrobe)
|
||||||
|
{
|
||||||
|
HWREGH(base + EQEP_O_QDECCTL) |= EQEP_QDECCTL_QSP;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
HWREGH(base + EQEP_O_QDECCTL) &= ~EQEP_QDECCTL_QSP;
|
||||||
|
}
|
||||||
|
}
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,175 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: flash.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x Flash driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "flash.h"
|
||||||
|
|
||||||
|
#ifndef __cplusplus
|
||||||
|
#pragma CODE_SECTION(Flash_initModule, ".TI.ramfunc");
|
||||||
|
#pragma CODE_SECTION(Flash_powerDown, ".TI.ramfunc");
|
||||||
|
#pragma CODE_SECTION(Flash_wakeFromLPM, ".TI.ramfunc");
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Flash_initModule
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma CODE_SECTION(".TI.ramfunc");
|
||||||
|
#endif
|
||||||
|
void
|
||||||
|
Flash_initModule(uint32_t ctrlBase, uint32_t eccBase, uint16_t waitstates)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(Flash_isCtrlBaseValid(ctrlBase));
|
||||||
|
ASSERT(Flash_isECCBaseValid(eccBase));
|
||||||
|
ASSERT(waitstates <= 0xFU);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the bank power up delay so that the bank will power up properly.
|
||||||
|
//
|
||||||
|
Flash_setBankPowerUpDelay(ctrlBase, 0x14);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the bank fallback power mode to active.
|
||||||
|
//
|
||||||
|
Flash_setBankPowerMode(ctrlBase, FLASH_BANK, FLASH_BANK_PWR_ACTIVE);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Power up flash bank and pump and this also sets the fall back mode of
|
||||||
|
// flash and pump as active
|
||||||
|
//
|
||||||
|
Flash_setPumpPowerMode(ctrlBase, FLASH_PUMP_PWR_ACTIVE);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Disable cache and prefetch mechanism before changing wait states
|
||||||
|
//
|
||||||
|
Flash_disableCache(ctrlBase);
|
||||||
|
Flash_disablePrefetch(ctrlBase);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set waitstates according to frequency.
|
||||||
|
//
|
||||||
|
Flash_setWaitstates(ctrlBase, waitstates);
|
||||||
|
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable cache and prefetch mechanism to improve performance of code
|
||||||
|
// executed from flash.
|
||||||
|
//
|
||||||
|
Flash_enableCache(ctrlBase);
|
||||||
|
Flash_enablePrefetch(ctrlBase);
|
||||||
|
|
||||||
|
//
|
||||||
|
// At reset, ECC is enabled. If it is disabled by application software and
|
||||||
|
// if application again wants to enable ECC.
|
||||||
|
//
|
||||||
|
Flash_enableECC(eccBase);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Force a pipeline flush to ensure that the write to the last register
|
||||||
|
// configured occurs before returning.
|
||||||
|
//
|
||||||
|
|
||||||
|
FLASH_DELAY_CONFIG;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Flash_powerDown
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma CODE_SECTION(".TI.ramfunc");
|
||||||
|
#endif
|
||||||
|
void
|
||||||
|
Flash_powerDown(uint32_t ctrlBase)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(Flash_isCtrlBaseValid(ctrlBase));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the bank power up delay so that it will power up properly.
|
||||||
|
//
|
||||||
|
Flash_setBankPowerUpDelay(ctrlBase, 0x14);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Power down the flash bank.
|
||||||
|
//
|
||||||
|
Flash_setBankPowerMode(ctrlBase, FLASH_BANK, FLASH_BANK_PWR_SLEEP);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Power down the flash pump.
|
||||||
|
//
|
||||||
|
Flash_setPumpPowerMode(ctrlBase, FLASH_PUMP_PWR_SLEEP);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// Flash_wakeFromLPM
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
#ifdef __cplusplus
|
||||||
|
#pragma CODE_SECTION(".TI.ramfunc");
|
||||||
|
#endif
|
||||||
|
void
|
||||||
|
Flash_wakeFromLPM(uint32_t ctrlBase)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(Flash_isCtrlBaseValid(ctrlBase));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the bank fallback power modes to active.
|
||||||
|
//
|
||||||
|
Flash_setBankPowerMode(ctrlBase, FLASH_BANK, FLASH_BANK_PWR_ACTIVE);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the flash pump power mode to active.
|
||||||
|
//
|
||||||
|
Flash_setPumpPowerMode(ctrlBase, FLASH_PUMP_PWR_ACTIVE);
|
||||||
|
}
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,489 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: gpio.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x GPIO driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "gpio.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// GPIO_setDirectionMode
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
GPIO_setDirectionMode(uint32_t pin, GPIO_Direction pinIO)
|
||||||
|
{
|
||||||
|
volatile uint32_t *gpioBaseAddr;
|
||||||
|
uint32_t pinMask;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(GPIO_isPinValid(pin));
|
||||||
|
|
||||||
|
gpioBaseAddr = (uint32_t *)GPIOCTRL_BASE +
|
||||||
|
((pin / 32U) * GPIO_CTRL_REGS_STEP);
|
||||||
|
pinMask = (uint32_t)1U << (pin % 32U);
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the data direction
|
||||||
|
//
|
||||||
|
if(pinIO == GPIO_DIR_MODE_OUT)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Output
|
||||||
|
//
|
||||||
|
gpioBaseAddr[GPIO_GPxDIR_INDEX] |= pinMask;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Input
|
||||||
|
//
|
||||||
|
gpioBaseAddr[GPIO_GPxDIR_INDEX] &= ~pinMask;
|
||||||
|
}
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// GPIO_getDirectionMode
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
GPIO_Direction
|
||||||
|
GPIO_getDirectionMode(uint32_t pin)
|
||||||
|
{
|
||||||
|
volatile uint32_t *gpioBaseAddr;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(GPIO_isPinValid(pin));
|
||||||
|
|
||||||
|
gpioBaseAddr = (uint32_t *)GPIOCTRL_BASE +
|
||||||
|
((pin / 32U) * GPIO_CTRL_REGS_STEP);
|
||||||
|
|
||||||
|
return((GPIO_Direction)((uint32_t)((gpioBaseAddr[GPIO_GPxDIR_INDEX] >>
|
||||||
|
(pin % 32U)) & 1U)));
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// GPIO_setInterruptPin
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
GPIO_setInterruptPin(uint32_t pin, GPIO_ExternalIntNum extIntNum)
|
||||||
|
{
|
||||||
|
XBAR_InputNum input;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(GPIO_isPinValid(pin));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Pick the X-BAR input that corresponds to the requested XINT.
|
||||||
|
//
|
||||||
|
switch(extIntNum)
|
||||||
|
{
|
||||||
|
case GPIO_INT_XINT1:
|
||||||
|
input = XBAR_INPUT4;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case GPIO_INT_XINT2:
|
||||||
|
input = XBAR_INPUT5;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case GPIO_INT_XINT3:
|
||||||
|
input = XBAR_INPUT6;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case GPIO_INT_XINT4:
|
||||||
|
input = XBAR_INPUT13;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case GPIO_INT_XINT5:
|
||||||
|
input = XBAR_INPUT14;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
//
|
||||||
|
// Invalid interrupt. Shouldn't happen if enum value is used.
|
||||||
|
// XBAR_INPUT1 isn't tied to an XINT, so we'll use it to check for
|
||||||
|
// a bad value.
|
||||||
|
//
|
||||||
|
input = XBAR_INPUT1;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(input != XBAR_INPUT1)
|
||||||
|
{
|
||||||
|
XBAR_setInputPin(input, (uint16_t)pin);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// GPIO_setPadConfig
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
GPIO_setPadConfig(uint32_t pin, uint32_t pinType)
|
||||||
|
{
|
||||||
|
volatile uint32_t *gpioBaseAddr;
|
||||||
|
uint32_t pinMask;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(GPIO_isPinValid(pin));
|
||||||
|
|
||||||
|
gpioBaseAddr = (uint32_t *)GPIOCTRL_BASE +
|
||||||
|
((pin / 32U) * GPIO_CTRL_REGS_STEP);
|
||||||
|
pinMask = (uint32_t)1U << (pin % 32U);
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable open drain if necessary
|
||||||
|
//
|
||||||
|
if((pinType & GPIO_PIN_TYPE_OD) != 0U)
|
||||||
|
{
|
||||||
|
gpioBaseAddr[GPIO_GPxODR_INDEX] |= pinMask;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
gpioBaseAddr[GPIO_GPxODR_INDEX] &= ~pinMask;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable pull-up if necessary
|
||||||
|
//
|
||||||
|
if((pinType & GPIO_PIN_TYPE_PULLUP) != 0U)
|
||||||
|
{
|
||||||
|
gpioBaseAddr[GPIO_GPxPUD_INDEX] &= ~pinMask;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
gpioBaseAddr[GPIO_GPxPUD_INDEX] |= pinMask;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Invert polarity if necessary
|
||||||
|
//
|
||||||
|
if((pinType & GPIO_PIN_TYPE_INVERT) != 0U)
|
||||||
|
{
|
||||||
|
gpioBaseAddr[GPIO_GPxINV_INDEX] |= pinMask;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
gpioBaseAddr[GPIO_GPxINV_INDEX] &= ~pinMask;
|
||||||
|
}
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// GPIO_getPadConfig
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
uint32_t
|
||||||
|
GPIO_getPadConfig(uint32_t pin)
|
||||||
|
{
|
||||||
|
volatile uint32_t *gpioBaseAddr;
|
||||||
|
uint32_t pinMask;
|
||||||
|
uint32_t pinTypeRes;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(GPIO_isPinValid(pin));
|
||||||
|
|
||||||
|
gpioBaseAddr = (uint32_t *)GPIOCTRL_BASE +
|
||||||
|
((pin / 32U) * GPIO_CTRL_REGS_STEP);
|
||||||
|
pinMask = (uint32_t)1U << (pin % 32U);
|
||||||
|
|
||||||
|
pinTypeRes = GPIO_PIN_TYPE_STD;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get open drain value
|
||||||
|
//
|
||||||
|
if((gpioBaseAddr[GPIO_GPxODR_INDEX] & pinMask) != 0U)
|
||||||
|
{
|
||||||
|
pinTypeRes |= GPIO_PIN_TYPE_OD;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get pull-up value
|
||||||
|
//
|
||||||
|
if((gpioBaseAddr[GPIO_GPxPUD_INDEX] & pinMask) == 0U)
|
||||||
|
{
|
||||||
|
pinTypeRes |= GPIO_PIN_TYPE_PULLUP;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Get polarity value
|
||||||
|
//
|
||||||
|
if((gpioBaseAddr[GPIO_GPxINV_INDEX] & pinMask) != 0U)
|
||||||
|
{
|
||||||
|
pinTypeRes |= GPIO_PIN_TYPE_INVERT;
|
||||||
|
}
|
||||||
|
|
||||||
|
return(pinTypeRes);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// GPIO_setQualificationMode
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
GPIO_setQualificationMode(uint32_t pin, GPIO_QualificationMode qualification)
|
||||||
|
{
|
||||||
|
volatile uint32_t *gpioBaseAddr;
|
||||||
|
uint32_t qSelIndex;
|
||||||
|
uint32_t shiftAmt;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(GPIO_isPinValid(pin));
|
||||||
|
|
||||||
|
gpioBaseAddr = (uint32_t *)GPIOCTRL_BASE +
|
||||||
|
((pin / 32U) * GPIO_CTRL_REGS_STEP);
|
||||||
|
shiftAmt = (uint32_t)GPIO_GPAQSEL1_GPIO1_S * (pin % 16U);
|
||||||
|
qSelIndex = GPIO_GPxQSEL_INDEX + ((pin % 32U) / 16U);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write the input qualification mode to the register.
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
gpioBaseAddr[qSelIndex] &= ~((uint32_t)GPIO_GPAQSEL1_GPIO0_M << shiftAmt);
|
||||||
|
gpioBaseAddr[qSelIndex] |= (uint32_t)qualification << shiftAmt;
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// GPIO_getQualificationMode
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
GPIO_QualificationMode
|
||||||
|
GPIO_getQualificationMode(uint32_t pin)
|
||||||
|
{
|
||||||
|
volatile uint32_t *gpioBaseAddr;
|
||||||
|
uint32_t qSelIndex;
|
||||||
|
uint32_t qualRes;
|
||||||
|
uint32_t shiftAmt;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(GPIO_isPinValid(pin));
|
||||||
|
|
||||||
|
gpioBaseAddr = (uint32_t *)GPIOCTRL_BASE +
|
||||||
|
((pin / 32U) * GPIO_CTRL_REGS_STEP);
|
||||||
|
shiftAmt = (uint32_t)GPIO_GPAQSEL1_GPIO1_S * (pin % 16U);
|
||||||
|
qSelIndex = GPIO_GPxQSEL_INDEX + ((pin % 32U) / 16U);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Read the qualification mode register and shift and mask to get the
|
||||||
|
// value for the specified pin.
|
||||||
|
//
|
||||||
|
qualRes = (gpioBaseAddr[qSelIndex] >> shiftAmt) &
|
||||||
|
(uint32_t)GPIO_GPAQSEL1_GPIO0_M;
|
||||||
|
return((GPIO_QualificationMode)qualRes);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// GPIO_setQualificationPeriod
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
GPIO_setQualificationPeriod(uint32_t pin, uint32_t divider)
|
||||||
|
{
|
||||||
|
volatile uint32_t *gpioBaseAddr;
|
||||||
|
uint32_t pinMask, regVal, shiftAmt;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(GPIO_isPinValid(pin));
|
||||||
|
ASSERT((divider >= 1U) && (divider <= 510U));
|
||||||
|
|
||||||
|
shiftAmt = (pin % 32U) & ~((uint32_t)0x7U);
|
||||||
|
pinMask = (uint32_t)0xFFU << shiftAmt;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Divide divider by two to get the value that needs to go into the field.
|
||||||
|
// Then shift it into the right place.
|
||||||
|
//
|
||||||
|
regVal = (divider / 2U) << shiftAmt;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write the divider parameter into the register.
|
||||||
|
//
|
||||||
|
gpioBaseAddr = (uint32_t *)GPIOCTRL_BASE +
|
||||||
|
((pin / 32U) * GPIO_CTRL_REGS_STEP);
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
gpioBaseAddr[GPIO_GPxCTRL_INDEX] &= ~pinMask;
|
||||||
|
gpioBaseAddr[GPIO_GPxCTRL_INDEX] |= regVal;
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// GPIO_setControllerCore
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
GPIO_setControllerCore(uint32_t pin, GPIO_CoreSelect core)
|
||||||
|
{
|
||||||
|
volatile uint32_t *gpioBaseAddr;
|
||||||
|
uint32_t cSelIndex;
|
||||||
|
uint32_t shiftAmt;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(GPIO_isPinValid(pin));
|
||||||
|
|
||||||
|
gpioBaseAddr = (uint32_t *)GPIOCTRL_BASE +
|
||||||
|
((pin / 32U) * GPIO_CTRL_REGS_STEP);
|
||||||
|
shiftAmt = (uint32_t)GPIO_GPACSEL1_GPIO1_S * (pin % 8U);
|
||||||
|
cSelIndex = GPIO_GPxCSEL_INDEX + ((pin % 32U) / 8U);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write the core parameter into the register.
|
||||||
|
//
|
||||||
|
EALLOW;
|
||||||
|
gpioBaseAddr[cSelIndex] &= ~((uint32_t)GPIO_GPACSEL1_GPIO0_M << shiftAmt);
|
||||||
|
gpioBaseAddr[cSelIndex] |= (uint32_t)core << shiftAmt;
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// GPIO_setAnalogMode
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
GPIO_setAnalogMode(uint32_t pin, GPIO_AnalogMode mode)
|
||||||
|
{
|
||||||
|
volatile uint32_t *gpioBaseAddr;
|
||||||
|
uint32_t pinMask;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT((pin == 42U) || (pin == 43U));
|
||||||
|
|
||||||
|
pinMask = (uint32_t)1U << (pin % 32U);
|
||||||
|
gpioBaseAddr = (uint32_t *)GPIOCTRL_BASE +
|
||||||
|
((pin / 32U) * GPIO_CTRL_REGS_STEP);
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the analog mode selection.
|
||||||
|
//
|
||||||
|
if(mode == GPIO_ANALOG_ENABLED)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Enable analog mode
|
||||||
|
//
|
||||||
|
gpioBaseAddr[GPIO_GPxAMSEL_INDEX] |= pinMask;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Disable analog mode
|
||||||
|
//
|
||||||
|
gpioBaseAddr[GPIO_GPxAMSEL_INDEX] &= ~pinMask;
|
||||||
|
}
|
||||||
|
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// GPIO_setPinConfig
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
GPIO_setPinConfig(uint32_t pinConfig)
|
||||||
|
{
|
||||||
|
uint32_t muxRegAddr;
|
||||||
|
uint32_t pinMask, shiftAmt;
|
||||||
|
|
||||||
|
muxRegAddr = (uint32_t)GPIOCTRL_BASE + (pinConfig >> 16);
|
||||||
|
shiftAmt = ((pinConfig >> 8) & (uint32_t)0xFFU);
|
||||||
|
pinMask = (uint32_t)0x3U << shiftAmt;
|
||||||
|
|
||||||
|
EALLOW;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear fields in MUX register first to avoid glitches
|
||||||
|
//
|
||||||
|
HWREG(muxRegAddr) &= ~pinMask;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write value into GMUX register
|
||||||
|
//
|
||||||
|
HWREG(muxRegAddr + GPIO_MUX_TO_GMUX) =
|
||||||
|
(HWREG(muxRegAddr + GPIO_MUX_TO_GMUX) & ~pinMask) |
|
||||||
|
(((pinConfig >> 2) & (uint32_t)0x3U) << shiftAmt);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Write value into MUX register
|
||||||
|
//
|
||||||
|
HWREG(muxRegAddr) |= ((pinConfig & (uint32_t)0x3U) << shiftAmt);
|
||||||
|
EDIS;
|
||||||
|
}
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,47 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: hrpwm.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x HRPWM driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include "hrpwm.h"
|
||||||
|
|
||||||
|
//
|
||||||
|
// All the API functions are in-lined in hrpwm.h
|
||||||
|
//
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,29 @@
|
|||||||
|
#ifndef HW_REG_INCLUSIVE_TERMINOLOGY_H
|
||||||
|
#define HW_REG_INCLUSIVE_TERMINOLOGY_H
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// SPI
|
||||||
|
//*****************************************************************************
|
||||||
|
#define SPI_CTL_CONTROLLER_PERIPHERAL SPI_CTL_MASTER_SLAVE
|
||||||
|
#define SPI_PRI_PTEINV SPI_PRI_STEINV
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
// I2C
|
||||||
|
//*****************************************************************************
|
||||||
|
#define I2C_O_TAR I2C_O_SAR
|
||||||
|
|
||||||
|
#define I2C_TAR_TAR_S I2C_SAR_SAR_S
|
||||||
|
#define I2C_TAR_TAR_M I2C_SAR_SAR_M
|
||||||
|
|
||||||
|
#define I2C_IER_AAT I2C_IER_AAS
|
||||||
|
|
||||||
|
#define I2C_STR_AAT I2C_STR_AAS
|
||||||
|
#define I2C_STR_TDIR I2C_STR_SDIR
|
||||||
|
|
||||||
|
#define I2C_MDR_CNT I2C_MDR_MST
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#endif // HW_REG_INCLUSIVE_TERMINOLOGY_H
|
||||||
@ -0,0 +1,351 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: i2c.c
|
||||||
|
//
|
||||||
|
// TITLE: C28x I2C driver.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#include <stdbool.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "i2c.h"
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// I2C_initController
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
I2C_initController(uint32_t base, uint32_t sysclkHz, uint32_t bitRate,
|
||||||
|
I2C_DutyCycle dutyCycle)
|
||||||
|
{
|
||||||
|
uint32_t modPrescale;
|
||||||
|
uint32_t divider;
|
||||||
|
uint32_t dValue;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(I2C_isBaseValid(base));
|
||||||
|
ASSERT((10000000U / bitRate) > 10U);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the prescaler for the module clock.
|
||||||
|
//
|
||||||
|
modPrescale = (sysclkHz / 10000000U) - 1U;
|
||||||
|
HWREGH(base + I2C_O_PSC) = I2C_PSC_IPSC_M & modPrescale;
|
||||||
|
|
||||||
|
switch(modPrescale)
|
||||||
|
{
|
||||||
|
case 0U:
|
||||||
|
dValue = 7U;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 1U:
|
||||||
|
dValue = 6U;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
dValue = 5U;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the divider for the time low
|
||||||
|
//
|
||||||
|
divider = (10000000U / bitRate) - (2U * dValue);
|
||||||
|
|
||||||
|
if(dutyCycle == I2C_DUTYCYCLE_50)
|
||||||
|
{
|
||||||
|
HWREGH(base + I2C_O_CLKH) = divider / 2U;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
HWREGH(base + I2C_O_CLKH) = divider / 3U;
|
||||||
|
}
|
||||||
|
|
||||||
|
HWREGH(base + I2C_O_CLKL) = divider - HWREGH(base + I2C_O_CLKH);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// I2C_initControllerModuleFrequency
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
I2C_initControllerModuleFrequency(uint32_t base, uint32_t sysclkHz, uint32_t bitRate,
|
||||||
|
I2C_DutyCycle dutyCycle, uint32_t moduleFrequency)
|
||||||
|
{
|
||||||
|
uint32_t modPrescale;
|
||||||
|
uint32_t divider;
|
||||||
|
uint32_t dValue;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(I2C_isBaseValid(base));
|
||||||
|
ASSERT((moduleFrequency / bitRate) > 10U);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the prescaler for the module clock.
|
||||||
|
//
|
||||||
|
modPrescale = (sysclkHz / moduleFrequency) - 1U;
|
||||||
|
HWREGH(base + I2C_O_PSC) = I2C_PSC_IPSC_M & modPrescale;
|
||||||
|
|
||||||
|
switch(modPrescale)
|
||||||
|
{
|
||||||
|
case 0U:
|
||||||
|
dValue = 7U;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 1U:
|
||||||
|
dValue = 6U;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
dValue = 5U;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the divider for the time low
|
||||||
|
//
|
||||||
|
divider = (moduleFrequency / bitRate) - (2U * dValue);
|
||||||
|
|
||||||
|
if(dutyCycle == I2C_DUTYCYCLE_50)
|
||||||
|
{
|
||||||
|
HWREGH(base + I2C_O_CLKH) = divider / 2U;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
HWREGH(base + I2C_O_CLKH) = divider / 3U;
|
||||||
|
}
|
||||||
|
|
||||||
|
HWREGH(base + I2C_O_CLKL) = divider - HWREGH(base + I2C_O_CLKH);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// I2C_enableInterrupt
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
I2C_enableInterrupt(uint32_t base, uint32_t intFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(I2C_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable the desired basic interrupts
|
||||||
|
//
|
||||||
|
HWREGH(base + I2C_O_IER) |= (intFlags & 0xFFFFU);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enabling addressed-as-target interrupt separately because its bit is
|
||||||
|
// different between the IER and STR registers.
|
||||||
|
//
|
||||||
|
if((intFlags & I2C_INT_ADDR_TARGET) != 0U)
|
||||||
|
{
|
||||||
|
HWREGH(base + I2C_O_IER) |= I2C_IER_AAT;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Enable desired FIFO interrupts.
|
||||||
|
//
|
||||||
|
if((intFlags & I2C_INT_TXFF) != 0U)
|
||||||
|
{
|
||||||
|
HWREGH(base + I2C_O_FFTX) |= I2C_FFTX_TXFFIENA;
|
||||||
|
}
|
||||||
|
|
||||||
|
if((intFlags & I2C_INT_RXFF) != 0U)
|
||||||
|
{
|
||||||
|
HWREGH(base + I2C_O_FFRX) |= I2C_FFRX_RXFFIENA;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// I2C_disableInterrupt
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
I2C_disableInterrupt(uint32_t base, uint32_t intFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(I2C_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Disable the desired basic interrupts.
|
||||||
|
//
|
||||||
|
HWREGH(base + I2C_O_IER) &= ~(intFlags & 0xFFFFU);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Disabling addressed-as-target interrupt separately because its bit is
|
||||||
|
// different between the IER and STR registers.
|
||||||
|
//
|
||||||
|
if((intFlags & I2C_INT_ADDR_TARGET) != 0U)
|
||||||
|
{
|
||||||
|
HWREGH(base + I2C_O_IER) &= ~I2C_IER_AAT;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Disable the desired FIFO interrupts.
|
||||||
|
//
|
||||||
|
if((intFlags & I2C_INT_TXFF) != 0U)
|
||||||
|
{
|
||||||
|
HWREGH(base + I2C_O_FFTX) &= ~(I2C_FFTX_TXFFIENA);
|
||||||
|
}
|
||||||
|
|
||||||
|
if((intFlags & I2C_INT_RXFF) != 0U)
|
||||||
|
{
|
||||||
|
HWREGH(base + I2C_O_FFRX) &= ~(I2C_FFRX_RXFFIENA);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// I2C_getInterruptStatus
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
uint32_t
|
||||||
|
I2C_getInterruptStatus(uint32_t base)
|
||||||
|
{
|
||||||
|
uint32_t temp;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(I2C_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Return only the status bits associated with interrupts.
|
||||||
|
//
|
||||||
|
temp = (uint32_t)HWREGH(base + I2C_O_STR) & (uint32_t)I2C_STR_INTMASK;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Read FIFO interrupt flags.
|
||||||
|
//
|
||||||
|
if((HWREGH(base + I2C_O_FFTX) & I2C_FFTX_TXFFINT) != 0U)
|
||||||
|
{
|
||||||
|
temp |= I2C_INT_TXFF;
|
||||||
|
}
|
||||||
|
|
||||||
|
if((HWREGH(base + I2C_O_FFRX) & I2C_FFRX_RXFFINT) != 0U)
|
||||||
|
{
|
||||||
|
temp |= I2C_INT_RXFF;
|
||||||
|
}
|
||||||
|
|
||||||
|
return(temp);
|
||||||
|
}
|
||||||
|
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// I2C_clearInterruptStatus
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
I2C_clearInterruptStatus(uint32_t base, uint32_t intFlags)
|
||||||
|
{
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(I2C_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear the interrupt flags that are located in STR.
|
||||||
|
//
|
||||||
|
HWREGH(base + I2C_O_STR) = ((uint16_t)intFlags & I2C_STR_INTMASK);
|
||||||
|
|
||||||
|
//
|
||||||
|
// Clear the FIFO interrupt flags if needed.
|
||||||
|
//
|
||||||
|
if((intFlags & I2C_INT_TXFF) != 0U)
|
||||||
|
{
|
||||||
|
HWREGH(base + I2C_O_FFTX) |= I2C_FFTX_TXFFINTCLR;
|
||||||
|
}
|
||||||
|
|
||||||
|
if((intFlags & I2C_INT_RXFF) != 0U)
|
||||||
|
{
|
||||||
|
HWREGH(base + I2C_O_FFRX) |= I2C_FFRX_RXFFINTCLR;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// I2C_configureModuleFrequency
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
I2C_configureModuleFrequency(uint32_t base, uint32_t sysclkHz)
|
||||||
|
{
|
||||||
|
uint32_t modPrescale;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(I2C_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the prescaler for the module clock.
|
||||||
|
//
|
||||||
|
modPrescale = (sysclkHz / 10000000U) - 1U;
|
||||||
|
HWREGH(base + I2C_O_PSC) = I2C_PSC_IPSC_M & modPrescale;
|
||||||
|
}
|
||||||
|
//*****************************************************************************
|
||||||
|
//
|
||||||
|
// I2C_configureModuleClockFrequency
|
||||||
|
//
|
||||||
|
//*****************************************************************************
|
||||||
|
void
|
||||||
|
I2C_configureModuleClockFrequency(uint32_t base, uint32_t sysclkHz, uint32_t moduleFrequency)
|
||||||
|
{
|
||||||
|
uint32_t modPrescale;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the arguments.
|
||||||
|
//
|
||||||
|
ASSERT(I2C_isBaseValid(base));
|
||||||
|
|
||||||
|
//
|
||||||
|
// Set the prescaler for the module clock.
|
||||||
|
//
|
||||||
|
modPrescale = (sysclkHz / moduleFrequency) - 1U;
|
||||||
|
HWREGH(base + I2C_O_PSC) = I2C_PSC_IPSC_M & modPrescale;
|
||||||
|
}
|
||||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,911 @@
|
|||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: hw_adc.h
|
||||||
|
//
|
||||||
|
// TITLE: Definitions for the ADC registers.
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// C2000Ware v26.00.00.00
|
||||||
|
//
|
||||||
|
// Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
|
||||||
|
#ifndef HW_ADC_H
|
||||||
|
#define HW_ADC_H
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the ADC register offsets
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_O_CTL1 0x0U // ADC Control 1 Register
|
||||||
|
#define ADC_O_CTL2 0x1U // ADC Control 2 Register
|
||||||
|
#define ADC_O_BURSTCTL 0x2U // ADC Burst Control Register
|
||||||
|
#define ADC_O_INTFLG 0x3U // ADC Interrupt Flag Register
|
||||||
|
#define ADC_O_INTFLGCLR 0x4U // ADC Interrupt Flag Clear Register
|
||||||
|
#define ADC_O_INTOVF 0x5U // ADC Interrupt Overflow Register
|
||||||
|
#define ADC_O_INTOVFCLR 0x6U // ADC Interrupt Overflow Clear Register
|
||||||
|
#define ADC_O_INTSEL1N2 0x7U // ADC Interrupt 1 and 2 Selection Register
|
||||||
|
#define ADC_O_INTSEL3N4 0x8U // ADC Interrupt 3 and 4 Selection Register
|
||||||
|
#define ADC_O_SOCPRICTL 0x9U // ADC SOC Priority Control Register
|
||||||
|
#define ADC_O_INTSOCSEL1 0xAU // ADC Interrupt SOC Selection 1 Register
|
||||||
|
#define ADC_O_INTSOCSEL2 0xBU // ADC Interrupt SOC Selection 2 Register
|
||||||
|
#define ADC_O_SOCFLG1 0xCU // ADC SOC Flag 1 Register
|
||||||
|
#define ADC_O_SOCFRC1 0xDU // ADC SOC Force 1 Register
|
||||||
|
#define ADC_O_SOCOVF1 0xEU // ADC SOC Overflow 1 Register
|
||||||
|
#define ADC_O_SOCOVFCLR1 0xFU // ADC SOC Overflow Clear 1 Register
|
||||||
|
#define ADC_O_SOC0CTL 0x10U // ADC SOC0 Control Register
|
||||||
|
#define ADC_O_SOC1CTL 0x12U // ADC SOC1 Control Register
|
||||||
|
#define ADC_O_SOC2CTL 0x14U // ADC SOC2 Control Register
|
||||||
|
#define ADC_O_SOC3CTL 0x16U // ADC SOC3 Control Register
|
||||||
|
#define ADC_O_SOC4CTL 0x18U // ADC SOC4 Control Register
|
||||||
|
#define ADC_O_SOC5CTL 0x1AU // ADC SOC5 Control Register
|
||||||
|
#define ADC_O_SOC6CTL 0x1CU // ADC SOC6 Control Register
|
||||||
|
#define ADC_O_SOC7CTL 0x1EU // ADC SOC7 Control Register
|
||||||
|
#define ADC_O_SOC8CTL 0x20U // ADC SOC8 Control Register
|
||||||
|
#define ADC_O_SOC9CTL 0x22U // ADC SOC9 Control Register
|
||||||
|
#define ADC_O_SOC10CTL 0x24U // ADC SOC10 Control Register
|
||||||
|
#define ADC_O_SOC11CTL 0x26U // ADC SOC11 Control Register
|
||||||
|
#define ADC_O_SOC12CTL 0x28U // ADC SOC12 Control Register
|
||||||
|
#define ADC_O_SOC13CTL 0x2AU // ADC SOC13 Control Register
|
||||||
|
#define ADC_O_SOC14CTL 0x2CU // ADC SOC14 Control Register
|
||||||
|
#define ADC_O_SOC15CTL 0x2EU // ADC SOC15 Control Register
|
||||||
|
#define ADC_O_EVTSTAT 0x30U // ADC Event Status Register
|
||||||
|
#define ADC_O_EVTCLR 0x32U // ADC Event Clear Register
|
||||||
|
#define ADC_O_EVTSEL 0x34U // ADC Event Selection Register
|
||||||
|
#define ADC_O_EVTINTSEL 0x36U // ADC Event Interrupt Selection Register
|
||||||
|
#define ADC_O_OSDETECT 0x38U // ADC Open and Shorts Detect Register
|
||||||
|
#define ADC_O_COUNTER 0x39U // ADC Counter Register
|
||||||
|
#define ADC_O_REV 0x3AU // ADC Revision Register
|
||||||
|
#define ADC_O_OFFTRIM 0x3BU // ADC Offset Trim Register
|
||||||
|
#define ADC_O_PPB1CONFIG 0x40U // ADC PPB1 Config Register
|
||||||
|
#define ADC_O_PPB1STAMP 0x41U // ADC PPB1 Sample Delay Time Stamp Register
|
||||||
|
#define ADC_O_PPB1OFFCAL 0x42U // ADC PPB1 Offset Calibration Register
|
||||||
|
#define ADC_O_PPB1OFFREF 0x43U // ADC PPB1 Offset Reference Register
|
||||||
|
#define ADC_O_PPB1TRIPHI 0x44U // ADC PPB1 Trip High Register
|
||||||
|
#define ADC_O_PPB1TRIPLO 0x46U // ADC PPB1 Trip Low/Trigger Time Stamp Register
|
||||||
|
#define ADC_O_PPB2CONFIG 0x48U // ADC PPB2 Config Register
|
||||||
|
#define ADC_O_PPB2STAMP 0x49U // ADC PPB2 Sample Delay Time Stamp Register
|
||||||
|
#define ADC_O_PPB2OFFCAL 0x4AU // ADC PPB2 Offset Calibration Register
|
||||||
|
#define ADC_O_PPB2OFFREF 0x4BU // ADC PPB2 Offset Reference Register
|
||||||
|
#define ADC_O_PPB2TRIPHI 0x4CU // ADC PPB2 Trip High Register
|
||||||
|
#define ADC_O_PPB2TRIPLO 0x4EU // ADC PPB2 Trip Low/Trigger Time Stamp Register
|
||||||
|
#define ADC_O_PPB3CONFIG 0x50U // ADC PPB3 Config Register
|
||||||
|
#define ADC_O_PPB3STAMP 0x51U // ADC PPB3 Sample Delay Time Stamp Register
|
||||||
|
#define ADC_O_PPB3OFFCAL 0x52U // ADC PPB3 Offset Calibration Register
|
||||||
|
#define ADC_O_PPB3OFFREF 0x53U // ADC PPB3 Offset Reference Register
|
||||||
|
#define ADC_O_PPB3TRIPHI 0x54U // ADC PPB3 Trip High Register
|
||||||
|
#define ADC_O_PPB3TRIPLO 0x56U // ADC PPB3 Trip Low/Trigger Time Stamp Register
|
||||||
|
#define ADC_O_PPB4CONFIG 0x58U // ADC PPB4 Config Register
|
||||||
|
#define ADC_O_PPB4STAMP 0x59U // ADC PPB4 Sample Delay Time Stamp Register
|
||||||
|
#define ADC_O_PPB4OFFCAL 0x5AU // ADC PPB4 Offset Calibration Register
|
||||||
|
#define ADC_O_PPB4OFFREF 0x5BU // ADC PPB4 Offset Reference Register
|
||||||
|
#define ADC_O_PPB4TRIPHI 0x5CU // ADC PPB4 Trip High Register
|
||||||
|
#define ADC_O_PPB4TRIPLO 0x5EU // ADC PPB4 Trip Low/Trigger Time Stamp Register
|
||||||
|
#define ADC_O_INLTRIM1 0x70U // ADC Linearity Trim 1 Register
|
||||||
|
#define ADC_O_INLTRIM2 0x72U // ADC Linearity Trim 2 Register
|
||||||
|
#define ADC_O_INLTRIM3 0x74U // ADC Linearity Trim 3 Register
|
||||||
|
#define ADC_O_INLTRIM4 0x76U // ADC Linearity Trim 4 Register
|
||||||
|
#define ADC_O_INLTRIM5 0x78U // ADC Linearity Trim 5 Register
|
||||||
|
#define ADC_O_INLTRIM6 0x7AU // ADC Linearity Trim 6 Register
|
||||||
|
|
||||||
|
#define ADC_O_RESULT0 0x0U // ADC Result 0 Register
|
||||||
|
#define ADC_O_RESULT1 0x1U // ADC Result 1 Register
|
||||||
|
#define ADC_O_RESULT2 0x2U // ADC Result 2 Register
|
||||||
|
#define ADC_O_RESULT3 0x3U // ADC Result 3 Register
|
||||||
|
#define ADC_O_RESULT4 0x4U // ADC Result 4 Register
|
||||||
|
#define ADC_O_RESULT5 0x5U // ADC Result 5 Register
|
||||||
|
#define ADC_O_RESULT6 0x6U // ADC Result 6 Register
|
||||||
|
#define ADC_O_RESULT7 0x7U // ADC Result 7 Register
|
||||||
|
#define ADC_O_RESULT8 0x8U // ADC Result 8 Register
|
||||||
|
#define ADC_O_RESULT9 0x9U // ADC Result 9 Register
|
||||||
|
#define ADC_O_RESULT10 0xAU // ADC Result 10 Register
|
||||||
|
#define ADC_O_RESULT11 0xBU // ADC Result 11 Register
|
||||||
|
#define ADC_O_RESULT12 0xCU // ADC Result 12 Register
|
||||||
|
#define ADC_O_RESULT13 0xDU // ADC Result 13 Register
|
||||||
|
#define ADC_O_RESULT14 0xEU // ADC Result 14 Register
|
||||||
|
#define ADC_O_RESULT15 0xFU // ADC Result 15 Register
|
||||||
|
#define ADC_O_PPB1RESULT 0x10U // ADC Post Processing Block 1 Result Register
|
||||||
|
#define ADC_O_PPB2RESULT 0x12U // ADC Post Processing Block 2 Result Register
|
||||||
|
#define ADC_O_PPB3RESULT 0x14U // ADC Post Processing Block 3 Result Register
|
||||||
|
#define ADC_O_PPB4RESULT 0x16U // ADC Post Processing Block 4 Result Register
|
||||||
|
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCCTL1 register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_CTL1_INTPULSEPOS 0x4U // ADC Interrupt Pulse Position
|
||||||
|
#define ADC_CTL1_ADCPWDNZ 0x80U // ADC Power Down
|
||||||
|
#define ADC_CTL1_ADCBSYCHN_S 8U
|
||||||
|
#define ADC_CTL1_ADCBSYCHN_M 0xF00U // ADC Busy Channel
|
||||||
|
#define ADC_CTL1_ADCBSY 0x2000U // ADC Busy
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCCTL2 register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_CTL2_PRESCALE_S 0U
|
||||||
|
#define ADC_CTL2_PRESCALE_M 0xFU // ADC Clock Prescaler
|
||||||
|
#define ADC_CTL2_RESOLUTION 0x40U // SOC Conversion Resolution
|
||||||
|
#define ADC_CTL2_SIGNALMODE 0x80U // SOC Signaling Mode
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCBURSTCTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_BURSTCTL_BURSTTRIGSEL_S 0U
|
||||||
|
#define ADC_BURSTCTL_BURSTTRIGSEL_M 0x3FU // SOC Burst Trigger Source Select
|
||||||
|
#define ADC_BURSTCTL_BURSTSIZE_S 8U
|
||||||
|
#define ADC_BURSTCTL_BURSTSIZE_M 0xF00U // SOC Burst Size Select
|
||||||
|
#define ADC_BURSTCTL_BURSTEN 0x8000U // SOC Burst Mode Enable
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCINTFLG register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_INTFLG_ADCINT1 0x1U // ADC Interrupt 1 Flag
|
||||||
|
#define ADC_INTFLG_ADCINT2 0x2U // ADC Interrupt 2 Flag
|
||||||
|
#define ADC_INTFLG_ADCINT3 0x4U // ADC Interrupt 3 Flag
|
||||||
|
#define ADC_INTFLG_ADCINT4 0x8U // ADC Interrupt 4 Flag
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCINTFLGCLR register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_INTFLGCLR_ADCINT1 0x1U // ADC Interrupt 1 Flag Clear
|
||||||
|
#define ADC_INTFLGCLR_ADCINT2 0x2U // ADC Interrupt 2 Flag Clear
|
||||||
|
#define ADC_INTFLGCLR_ADCINT3 0x4U // ADC Interrupt 3 Flag Clear
|
||||||
|
#define ADC_INTFLGCLR_ADCINT4 0x8U // ADC Interrupt 4 Flag Clear
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCINTOVF register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_INTOVF_ADCINT1 0x1U // ADC Interrupt 1 Overflow Flags
|
||||||
|
#define ADC_INTOVF_ADCINT2 0x2U // ADC Interrupt 2 Overflow Flags
|
||||||
|
#define ADC_INTOVF_ADCINT3 0x4U // ADC Interrupt 3 Overflow Flags
|
||||||
|
#define ADC_INTOVF_ADCINT4 0x8U // ADC Interrupt 4 Overflow Flags
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCINTOVFCLR register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_INTOVFCLR_ADCINT1 0x1U // ADC Interrupt 1 Overflow Clear Bits
|
||||||
|
#define ADC_INTOVFCLR_ADCINT2 0x2U // ADC Interrupt 2 Overflow Clear Bits
|
||||||
|
#define ADC_INTOVFCLR_ADCINT3 0x4U // ADC Interrupt 3 Overflow Clear Bits
|
||||||
|
#define ADC_INTOVFCLR_ADCINT4 0x8U // ADC Interrupt 4 Overflow Clear Bits
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCINTSEL1N2 register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_INTSEL1N2_INT1SEL_S 0U
|
||||||
|
#define ADC_INTSEL1N2_INT1SEL_M 0xFU // ADCINT1 EOC Source Select
|
||||||
|
#define ADC_INTSEL1N2_INT1E 0x20U // ADCINT1 Interrupt Enable
|
||||||
|
#define ADC_INTSEL1N2_INT1CONT 0x40U // ADCINT1 Continue to Interrupt Mode
|
||||||
|
#define ADC_INTSEL1N2_INT2SEL_S 8U
|
||||||
|
#define ADC_INTSEL1N2_INT2SEL_M 0xF00U // ADCINT2 EOC Source Select
|
||||||
|
#define ADC_INTSEL1N2_INT2E 0x2000U // ADCINT2 Interrupt Enable
|
||||||
|
#define ADC_INTSEL1N2_INT2CONT 0x4000U // ADCINT2 Continue to Interrupt Mode
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCINTSEL3N4 register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_INTSEL3N4_INT3SEL_S 0U
|
||||||
|
#define ADC_INTSEL3N4_INT3SEL_M 0xFU // ADCINT3 EOC Source Select
|
||||||
|
#define ADC_INTSEL3N4_INT3E 0x20U // ADCINT3 Interrupt Enable
|
||||||
|
#define ADC_INTSEL3N4_INT3CONT 0x40U // ADCINT3 Continue to Interrupt Mode
|
||||||
|
#define ADC_INTSEL3N4_INT4SEL_S 8U
|
||||||
|
#define ADC_INTSEL3N4_INT4SEL_M 0xF00U // ADCINT4 EOC Source Select
|
||||||
|
#define ADC_INTSEL3N4_INT4E 0x2000U // ADCINT4 Interrupt Enable
|
||||||
|
#define ADC_INTSEL3N4_INT4CONT 0x4000U // ADCINT4 Continue to Interrupt Mode
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOCPRICTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOCPRICTL_SOCPRIORITY_S 0U
|
||||||
|
#define ADC_SOCPRICTL_SOCPRIORITY_M 0x1FU // SOC Priority
|
||||||
|
#define ADC_SOCPRICTL_RRPOINTER_S 5U
|
||||||
|
#define ADC_SOCPRICTL_RRPOINTER_M 0x3E0U // Round Robin Pointer
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCINTSOCSEL1 register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_INTSOCSEL1_SOC0_S 0U
|
||||||
|
#define ADC_INTSOCSEL1_SOC0_M 0x3U // SOC0 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL1_SOC1_S 2U
|
||||||
|
#define ADC_INTSOCSEL1_SOC1_M 0xCU // SOC1 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL1_SOC2_S 4U
|
||||||
|
#define ADC_INTSOCSEL1_SOC2_M 0x30U // SOC2 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL1_SOC3_S 6U
|
||||||
|
#define ADC_INTSOCSEL1_SOC3_M 0xC0U // SOC3 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL1_SOC4_S 8U
|
||||||
|
#define ADC_INTSOCSEL1_SOC4_M 0x300U // SOC4 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL1_SOC5_S 10U
|
||||||
|
#define ADC_INTSOCSEL1_SOC5_M 0xC00U // SOC5 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL1_SOC6_S 12U
|
||||||
|
#define ADC_INTSOCSEL1_SOC6_M 0x3000U // SOC6 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL1_SOC7_S 14U
|
||||||
|
#define ADC_INTSOCSEL1_SOC7_M 0xC000U // SOC7 ADC Interrupt Trigger Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCINTSOCSEL2 register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_INTSOCSEL2_SOC8_S 0U
|
||||||
|
#define ADC_INTSOCSEL2_SOC8_M 0x3U // SOC8 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL2_SOC9_S 2U
|
||||||
|
#define ADC_INTSOCSEL2_SOC9_M 0xCU // SOC9 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL2_SOC10_S 4U
|
||||||
|
#define ADC_INTSOCSEL2_SOC10_M 0x30U // SOC10 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL2_SOC11_S 6U
|
||||||
|
#define ADC_INTSOCSEL2_SOC11_M 0xC0U // SOC11 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL2_SOC12_S 8U
|
||||||
|
#define ADC_INTSOCSEL2_SOC12_M 0x300U // SOC12 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL2_SOC13_S 10U
|
||||||
|
#define ADC_INTSOCSEL2_SOC13_M 0xC00U // SOC13 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL2_SOC14_S 12U
|
||||||
|
#define ADC_INTSOCSEL2_SOC14_M 0x3000U // SOC14 ADC Interrupt Trigger Select
|
||||||
|
#define ADC_INTSOCSEL2_SOC15_S 14U
|
||||||
|
#define ADC_INTSOCSEL2_SOC15_M 0xC000U // SOC15 ADC Interrupt Trigger Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOCFLG1 register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOCFLG1_SOC0 0x1U // SOC0 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC1 0x2U // SOC1 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC2 0x4U // SOC2 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC3 0x8U // SOC3 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC4 0x10U // SOC4 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC5 0x20U // SOC5 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC6 0x40U // SOC6 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC7 0x80U // SOC7 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC8 0x100U // SOC8 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC9 0x200U // SOC9 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC10 0x400U // SOC10 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC11 0x800U // SOC11 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC12 0x1000U // SOC12 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC13 0x2000U // SOC13 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC14 0x4000U // SOC14 Start of Conversion Flag
|
||||||
|
#define ADC_SOCFLG1_SOC15 0x8000U // SOC15 Start of Conversion Flag
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOCFRC1 register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOCFRC1_SOC0 0x1U // SOC0 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC1 0x2U // SOC1 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC2 0x4U // SOC2 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC3 0x8U // SOC3 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC4 0x10U // SOC4 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC5 0x20U // SOC5 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC6 0x40U // SOC6 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC7 0x80U // SOC7 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC8 0x100U // SOC8 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC9 0x200U // SOC9 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC10 0x400U // SOC10 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC11 0x800U // SOC11 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC12 0x1000U // SOC12 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC13 0x2000U // SOC13 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC14 0x4000U // SOC14 Force Start of Conversion Bit
|
||||||
|
#define ADC_SOCFRC1_SOC15 0x8000U // SOC15 Force Start of Conversion Bit
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOCOVF1 register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOCOVF1_SOC0 0x1U // SOC0 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC1 0x2U // SOC1 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC2 0x4U // SOC2 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC3 0x8U // SOC3 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC4 0x10U // SOC4 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC5 0x20U // SOC5 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC6 0x40U // SOC6 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC7 0x80U // SOC7 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC8 0x100U // SOC8 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC9 0x200U // SOC9 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC10 0x400U // SOC10 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC11 0x800U // SOC11 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC12 0x1000U // SOC12 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC13 0x2000U // SOC13 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC14 0x4000U // SOC14 Start of Conversion Overflow Flag
|
||||||
|
#define ADC_SOCOVF1_SOC15 0x8000U // SOC15 Start of Conversion Overflow Flag
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOCOVFCLR1 register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOCOVFCLR1_SOC0 0x1U // SOC0 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC1 0x2U // SOC1 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC2 0x4U // SOC2 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC3 0x8U // SOC3 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC4 0x10U // SOC4 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC5 0x20U // SOC5 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC6 0x40U // SOC6 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC7 0x80U // SOC7 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC8 0x100U // SOC8 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC9 0x200U // SOC9 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC10 0x400U // SOC10 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC11 0x800U // SOC11 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC12 0x1000U // SOC12 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC13 0x2000U // SOC13 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC14 0x4000U // SOC14 Clear Start of Conversion Overflow Bit
|
||||||
|
#define ADC_SOCOVFCLR1_SOC15 0x8000U // SOC15 Clear Start of Conversion Overflow Bit
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC0CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC0CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC0CTL_ACQPS_M 0x1FFU // SOC0 Acquisition Prescale
|
||||||
|
#define ADC_SOC0CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC0CTL_CHSEL_M 0x78000U // SOC0 Channel Select
|
||||||
|
#define ADC_SOC0CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC0CTL_TRIGSEL_M 0x1F00000U // SOC0 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC1CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC1CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC1CTL_ACQPS_M 0x1FFU // SOC1 Acquisition Prescale
|
||||||
|
#define ADC_SOC1CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC1CTL_CHSEL_M 0x78000U // SOC1 Channel Select
|
||||||
|
#define ADC_SOC1CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC1CTL_TRIGSEL_M 0x1F00000U // SOC1 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC2CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC2CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC2CTL_ACQPS_M 0x1FFU // SOC2 Acquisition Prescale
|
||||||
|
#define ADC_SOC2CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC2CTL_CHSEL_M 0x78000U // SOC2 Channel Select
|
||||||
|
#define ADC_SOC2CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC2CTL_TRIGSEL_M 0x1F00000U // SOC2 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC3CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC3CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC3CTL_ACQPS_M 0x1FFU // SOC3 Acquisition Prescale
|
||||||
|
#define ADC_SOC3CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC3CTL_CHSEL_M 0x78000U // SOC3 Channel Select
|
||||||
|
#define ADC_SOC3CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC3CTL_TRIGSEL_M 0x1F00000U // SOC3 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC4CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC4CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC4CTL_ACQPS_M 0x1FFU // SOC4 Acquisition Prescale
|
||||||
|
#define ADC_SOC4CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC4CTL_CHSEL_M 0x78000U // SOC4 Channel Select
|
||||||
|
#define ADC_SOC4CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC4CTL_TRIGSEL_M 0x1F00000U // SOC4 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC5CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC5CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC5CTL_ACQPS_M 0x1FFU // SOC5 Acquisition Prescale
|
||||||
|
#define ADC_SOC5CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC5CTL_CHSEL_M 0x78000U // SOC5 Channel Select
|
||||||
|
#define ADC_SOC5CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC5CTL_TRIGSEL_M 0x1F00000U // SOC5 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC6CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC6CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC6CTL_ACQPS_M 0x1FFU // SOC6 Acquisition Prescale
|
||||||
|
#define ADC_SOC6CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC6CTL_CHSEL_M 0x78000U // SOC6 Channel Select
|
||||||
|
#define ADC_SOC6CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC6CTL_TRIGSEL_M 0x1F00000U // SOC6 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC7CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC7CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC7CTL_ACQPS_M 0x1FFU // SOC7 Acquisition Prescale
|
||||||
|
#define ADC_SOC7CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC7CTL_CHSEL_M 0x78000U // SOC7 Channel Select
|
||||||
|
#define ADC_SOC7CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC7CTL_TRIGSEL_M 0x1F00000U // SOC7 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC8CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC8CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC8CTL_ACQPS_M 0x1FFU // SOC8 Acquisition Prescale
|
||||||
|
#define ADC_SOC8CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC8CTL_CHSEL_M 0x78000U // SOC8 Channel Select
|
||||||
|
#define ADC_SOC8CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC8CTL_TRIGSEL_M 0x1F00000U // SOC8 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC9CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC9CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC9CTL_ACQPS_M 0x1FFU // SOC9 Acquisition Prescale
|
||||||
|
#define ADC_SOC9CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC9CTL_CHSEL_M 0x78000U // SOC9 Channel Select
|
||||||
|
#define ADC_SOC9CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC9CTL_TRIGSEL_M 0x1F00000U // SOC9 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC10CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC10CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC10CTL_ACQPS_M 0x1FFU // SOC10 Acquisition Prescale
|
||||||
|
#define ADC_SOC10CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC10CTL_CHSEL_M 0x78000U // SOC10 Channel Select
|
||||||
|
#define ADC_SOC10CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC10CTL_TRIGSEL_M 0x1F00000U // SOC10 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC11CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC11CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC11CTL_ACQPS_M 0x1FFU // SOC11 Acquisition Prescale
|
||||||
|
#define ADC_SOC11CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC11CTL_CHSEL_M 0x78000U // SOC11 Channel Select
|
||||||
|
#define ADC_SOC11CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC11CTL_TRIGSEL_M 0x1F00000U // SOC11 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC12CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC12CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC12CTL_ACQPS_M 0x1FFU // SOC12 Acquisition Prescale
|
||||||
|
#define ADC_SOC12CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC12CTL_CHSEL_M 0x78000U // SOC12 Channel Select
|
||||||
|
#define ADC_SOC12CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC12CTL_TRIGSEL_M 0x1F00000U // SOC12 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC13CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC13CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC13CTL_ACQPS_M 0x1FFU // SOC13 Acquisition Prescale
|
||||||
|
#define ADC_SOC13CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC13CTL_CHSEL_M 0x78000U // SOC13 Channel Select
|
||||||
|
#define ADC_SOC13CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC13CTL_TRIGSEL_M 0x1F00000U // SOC13 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC14CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC14CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC14CTL_ACQPS_M 0x1FFU // SOC14 Acquisition Prescale
|
||||||
|
#define ADC_SOC14CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC14CTL_CHSEL_M 0x78000U // SOC14 Channel Select
|
||||||
|
#define ADC_SOC14CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC14CTL_TRIGSEL_M 0x1F00000U // SOC14 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCSOC15CTL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_SOC15CTL_ACQPS_S 0U
|
||||||
|
#define ADC_SOC15CTL_ACQPS_M 0x1FFU // SOC15 Acquisition Prescale
|
||||||
|
#define ADC_SOC15CTL_CHSEL_S 15U
|
||||||
|
#define ADC_SOC15CTL_CHSEL_M 0x78000U // SOC15 Channel Select
|
||||||
|
#define ADC_SOC15CTL_TRIGSEL_S 20U
|
||||||
|
#define ADC_SOC15CTL_TRIGSEL_M 0x1F00000U // SOC15 Trigger Source Select
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCEVTSTAT register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_EVTSTAT_PPB1TRIPHI 0x1U // Post Processing Block 1 Trip High Flag
|
||||||
|
#define ADC_EVTSTAT_PPB1TRIPLO 0x2U // Post Processing Block 1 Trip Low Flag
|
||||||
|
#define ADC_EVTSTAT_PPB1ZERO 0x4U // Post Processing Block 1 Zero Crossing Flag
|
||||||
|
#define ADC_EVTSTAT_PPB2TRIPHI 0x10U // Post Processing Block 2 Trip High Flag
|
||||||
|
#define ADC_EVTSTAT_PPB2TRIPLO 0x20U // Post Processing Block 2 Trip Low Flag
|
||||||
|
#define ADC_EVTSTAT_PPB2ZERO 0x40U // Post Processing Block 2 Zero Crossing Flag
|
||||||
|
#define ADC_EVTSTAT_PPB3TRIPHI 0x100U // Post Processing Block 3 Trip High Flag
|
||||||
|
#define ADC_EVTSTAT_PPB3TRIPLO 0x200U // Post Processing Block 3 Trip Low Flag
|
||||||
|
#define ADC_EVTSTAT_PPB3ZERO 0x400U // Post Processing Block 3 Zero Crossing Flag
|
||||||
|
#define ADC_EVTSTAT_PPB4TRIPHI 0x1000U // Post Processing Block 4 Trip High Flag
|
||||||
|
#define ADC_EVTSTAT_PPB4TRIPLO 0x2000U // Post Processing Block 4 Trip Low Flag
|
||||||
|
#define ADC_EVTSTAT_PPB4ZERO 0x4000U // Post Processing Block 4 Zero Crossing Flag
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCEVTCLR register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_EVTCLR_PPB1TRIPHI 0x1U // Post Processing Block 1 Trip High Clear
|
||||||
|
#define ADC_EVTCLR_PPB1TRIPLO 0x2U // Post Processing Block 1 Trip Low Clear
|
||||||
|
#define ADC_EVTCLR_PPB1ZERO 0x4U // Post Processing Block 1 Zero Crossing Clear
|
||||||
|
#define ADC_EVTCLR_PPB2TRIPHI 0x10U // Post Processing Block 2 Trip High Clear
|
||||||
|
#define ADC_EVTCLR_PPB2TRIPLO 0x20U // Post Processing Block 2 Trip Low Clear
|
||||||
|
#define ADC_EVTCLR_PPB2ZERO 0x40U // Post Processing Block 2 Zero Crossing Clear
|
||||||
|
#define ADC_EVTCLR_PPB3TRIPHI 0x100U // Post Processing Block 3 Trip High Clear
|
||||||
|
#define ADC_EVTCLR_PPB3TRIPLO 0x200U // Post Processing Block 3 Trip Low Clear
|
||||||
|
#define ADC_EVTCLR_PPB3ZERO 0x400U // Post Processing Block 3 Zero Crossing Clear
|
||||||
|
#define ADC_EVTCLR_PPB4TRIPHI 0x1000U // Post Processing Block 4 Trip High Clear
|
||||||
|
#define ADC_EVTCLR_PPB4TRIPLO 0x2000U // Post Processing Block 4 Trip Low Clear
|
||||||
|
#define ADC_EVTCLR_PPB4ZERO 0x4000U // Post Processing Block 4 Zero Crossing Clear
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCEVTSEL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_EVTSEL_PPB1TRIPHI 0x1U // Post Processing Block 1 Trip High Event Enable
|
||||||
|
#define ADC_EVTSEL_PPB1TRIPLO 0x2U // Post Processing Block 1 Trip Low Event Enable
|
||||||
|
#define ADC_EVTSEL_PPB1ZERO 0x4U // Post Processing Block 1 Zero Crossing Event Enable
|
||||||
|
#define ADC_EVTSEL_PPB2TRIPHI 0x10U // Post Processing Block 2 Trip High Event Enable
|
||||||
|
#define ADC_EVTSEL_PPB2TRIPLO 0x20U // Post Processing Block 2 Trip Low Event Enable
|
||||||
|
#define ADC_EVTSEL_PPB2ZERO 0x40U // Post Processing Block 2 Zero Crossing Event Enable
|
||||||
|
#define ADC_EVTSEL_PPB3TRIPHI 0x100U // Post Processing Block 3 Trip High Event Enable
|
||||||
|
#define ADC_EVTSEL_PPB3TRIPLO 0x200U // Post Processing Block 3 Trip Low Event Enable
|
||||||
|
#define ADC_EVTSEL_PPB3ZERO 0x400U // Post Processing Block 3 Zero Crossing Event Enable
|
||||||
|
#define ADC_EVTSEL_PPB4TRIPHI 0x1000U // Post Processing Block 4 Trip High Event Enable
|
||||||
|
#define ADC_EVTSEL_PPB4TRIPLO 0x2000U // Post Processing Block 4 Trip Low Event Enable
|
||||||
|
#define ADC_EVTSEL_PPB4ZERO 0x4000U // Post Processing Block 4 Zero Crossing Event Enable
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCEVTINTSEL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_EVTINTSEL_PPB1TRIPHI 0x1U // Post Processing Block 1 Trip High Interrupt Enable
|
||||||
|
#define ADC_EVTINTSEL_PPB1TRIPLO 0x2U // Post Processing Block 1 Trip Low Interrupt Enable
|
||||||
|
#define ADC_EVTINTSEL_PPB1ZERO 0x4U // Post Processing Block 1 Zero Crossing Interrupt
|
||||||
|
// Enable
|
||||||
|
#define ADC_EVTINTSEL_PPB2TRIPHI 0x10U // Post Processing Block 2 Trip High Interrupt Enable
|
||||||
|
#define ADC_EVTINTSEL_PPB2TRIPLO 0x20U // Post Processing Block 2 Trip Low Interrupt Enable
|
||||||
|
#define ADC_EVTINTSEL_PPB2ZERO 0x40U // Post Processing Block 2 Zero Crossing Interrupt
|
||||||
|
// Enable
|
||||||
|
#define ADC_EVTINTSEL_PPB3TRIPHI 0x100U // Post Processing Block 3 Trip High Interrupt Enable
|
||||||
|
#define ADC_EVTINTSEL_PPB3TRIPLO 0x200U // Post Processing Block 3 Trip Low Interrupt Enable
|
||||||
|
#define ADC_EVTINTSEL_PPB3ZERO 0x400U // Post Processing Block 3 Zero Crossing Interrupt
|
||||||
|
// Enable
|
||||||
|
#define ADC_EVTINTSEL_PPB4TRIPHI 0x1000U // Post Processing Block 4 Trip High Interrupt Enable
|
||||||
|
#define ADC_EVTINTSEL_PPB4TRIPLO 0x2000U // Post Processing Block 4 Trip Low Interrupt Enable
|
||||||
|
#define ADC_EVTINTSEL_PPB4ZERO 0x4000U // Post Processing Block 4 Zero Crossing Interrupt
|
||||||
|
// Enable
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCOSDETECT register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_OSDETECT_DETECTCFG_S 0U
|
||||||
|
#define ADC_OSDETECT_DETECTCFG_M 0x7U // ADC Opens and Shorts Detect Configuration
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCCOUNTER register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_COUNTER_FREECOUNT_S 0U
|
||||||
|
#define ADC_COUNTER_FREECOUNT_M 0xFFFU // ADC Free Running Counter Value
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCREV register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_REV_TYPE_S 0U
|
||||||
|
#define ADC_REV_TYPE_M 0xFFU // ADC Type
|
||||||
|
#define ADC_REV_REV_S 8U
|
||||||
|
#define ADC_REV_REV_M 0xFF00U // ADC Revision
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCOFFTRIM register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_OFFTRIM_OFFTRIM_S 0U
|
||||||
|
#define ADC_OFFTRIM_OFFTRIM_M 0xFFU // ADC Offset Trim
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB1CONFIG register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB1CONFIG_CONFIG_S 0U
|
||||||
|
#define ADC_PPB1CONFIG_CONFIG_M 0xFU // ADC Post Processing Block 1 Configuration
|
||||||
|
#define ADC_PPB1CONFIG_TWOSCOMPEN 0x10U // ADC Post Processing Block 1 Two's Complement Enable
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB1STAMP register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB1STAMP_DLYSTAMP_S 0U
|
||||||
|
#define ADC_PPB1STAMP_DLYSTAMP_M 0xFFFU // ADC Post Processing Block 1 Delay Time Stamp
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB1OFFCAL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB1OFFCAL_OFFCAL_S 0U
|
||||||
|
#define ADC_PPB1OFFCAL_OFFCAL_M 0x3FFU // ADC Post Processing Block Offset Correction
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB1TRIPHI register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB1TRIPHI_LIMITHI_S 0U
|
||||||
|
#define ADC_PPB1TRIPHI_LIMITHI_M 0xFFFFU // ADC Post Processing Block 1 Trip High Limit
|
||||||
|
#define ADC_PPB1TRIPHI_HSIGN 0x10000U // High Limit Sign Bit
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB1TRIPLO register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB1TRIPLO_LIMITLO_S 0U
|
||||||
|
#define ADC_PPB1TRIPLO_LIMITLO_M 0xFFFFU // ADC Post Processing Block 1 Trip Low Limit
|
||||||
|
#define ADC_PPB1TRIPLO_LSIGN 0x10000U // Low Limit Sign Bit
|
||||||
|
#define ADC_PPB1TRIPLO_REQSTAMP_S 20U
|
||||||
|
#define ADC_PPB1TRIPLO_REQSTAMP_M 0xFFF00000U // ADC Post Processing Block 1 Request Time Stamp
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB2CONFIG register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB2CONFIG_CONFIG_S 0U
|
||||||
|
#define ADC_PPB2CONFIG_CONFIG_M 0xFU // ADC Post Processing Block 2 Configuration
|
||||||
|
#define ADC_PPB2CONFIG_TWOSCOMPEN 0x10U // ADC Post Processing Block 2 Two's Complement Enable
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB2STAMP register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB2STAMP_DLYSTAMP_S 0U
|
||||||
|
#define ADC_PPB2STAMP_DLYSTAMP_M 0xFFFU // ADC Post Processing Block 2 Delay Time Stamp
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB2OFFCAL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB2OFFCAL_OFFCAL_S 0U
|
||||||
|
#define ADC_PPB2OFFCAL_OFFCAL_M 0x3FFU // ADC Post Processing Block Offset Correction
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB2TRIPHI register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB2TRIPHI_LIMITHI_S 0U
|
||||||
|
#define ADC_PPB2TRIPHI_LIMITHI_M 0xFFFFU // ADC Post Processing Block 2 Trip High Limit
|
||||||
|
#define ADC_PPB2TRIPHI_HSIGN 0x10000U // High Limit Sign Bit
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB2TRIPLO register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB2TRIPLO_LIMITLO_S 0U
|
||||||
|
#define ADC_PPB2TRIPLO_LIMITLO_M 0xFFFFU // ADC Post Processing Block 2 Trip Low Limit
|
||||||
|
#define ADC_PPB2TRIPLO_LSIGN 0x10000U // Low Limit Sign Bit
|
||||||
|
#define ADC_PPB2TRIPLO_REQSTAMP_S 20U
|
||||||
|
#define ADC_PPB2TRIPLO_REQSTAMP_M 0xFFF00000U // ADC Post Processing Block 2 Request Time Stamp
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB3CONFIG register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB3CONFIG_CONFIG_S 0U
|
||||||
|
#define ADC_PPB3CONFIG_CONFIG_M 0xFU // ADC Post Processing Block 3 Configuration
|
||||||
|
#define ADC_PPB3CONFIG_TWOSCOMPEN 0x10U // ADC Post Processing Block 3 Two's Complement Enable
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB3STAMP register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB3STAMP_DLYSTAMP_S 0U
|
||||||
|
#define ADC_PPB3STAMP_DLYSTAMP_M 0xFFFU // ADC Post Processing Block 3 Delay Time Stamp
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB3OFFCAL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB3OFFCAL_OFFCAL_S 0U
|
||||||
|
#define ADC_PPB3OFFCAL_OFFCAL_M 0x3FFU // ADC Post Processing Block Offset Correction
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB3TRIPHI register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB3TRIPHI_LIMITHI_S 0U
|
||||||
|
#define ADC_PPB3TRIPHI_LIMITHI_M 0xFFFFU // ADC Post Processing Block 3 Trip High Limit
|
||||||
|
#define ADC_PPB3TRIPHI_HSIGN 0x10000U // High Limit Sign Bit
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB3TRIPLO register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB3TRIPLO_LIMITLO_S 0U
|
||||||
|
#define ADC_PPB3TRIPLO_LIMITLO_M 0xFFFFU // ADC Post Processing Block 3 Trip Low Limit
|
||||||
|
#define ADC_PPB3TRIPLO_LSIGN 0x10000U // Low Limit Sign Bit
|
||||||
|
#define ADC_PPB3TRIPLO_REQSTAMP_S 20U
|
||||||
|
#define ADC_PPB3TRIPLO_REQSTAMP_M 0xFFF00000U // ADC Post Processing Block 3 Request Time Stamp
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB4CONFIG register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB4CONFIG_CONFIG_S 0U
|
||||||
|
#define ADC_PPB4CONFIG_CONFIG_M 0xFU // ADC Post Processing Block 4 Configuration
|
||||||
|
#define ADC_PPB4CONFIG_TWOSCOMPEN 0x10U // ADC Post Processing Block 4 Two's Complement Enable
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB4STAMP register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB4STAMP_DLYSTAMP_S 0U
|
||||||
|
#define ADC_PPB4STAMP_DLYSTAMP_M 0xFFFU // ADC Post Processing Block 4 Delay Time Stamp
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB4OFFCAL register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB4OFFCAL_OFFCAL_S 0U
|
||||||
|
#define ADC_PPB4OFFCAL_OFFCAL_M 0x3FFU // ADC Post Processing Block Offset Correction
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB4TRIPHI register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB4TRIPHI_LIMITHI_S 0U
|
||||||
|
#define ADC_PPB4TRIPHI_LIMITHI_M 0xFFFFU // ADC Post Processing Block 4 Trip High Limit
|
||||||
|
#define ADC_PPB4TRIPHI_HSIGN 0x10000U // High Limit Sign Bit
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB4TRIPLO register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB4TRIPLO_LIMITLO_S 0U
|
||||||
|
#define ADC_PPB4TRIPLO_LIMITLO_M 0xFFFFU // ADC Post Processing Block 4 Trip Low Limit
|
||||||
|
#define ADC_PPB4TRIPLO_LSIGN 0x10000U // Low Limit Sign Bit
|
||||||
|
#define ADC_PPB4TRIPLO_REQSTAMP_S 20U
|
||||||
|
#define ADC_PPB4TRIPLO_REQSTAMP_M 0xFFF00000U // ADC Post Processing Block 4 Request Time Stamp
|
||||||
|
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB1RESULT register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB1RESULT_PPBRESULT_S 0U
|
||||||
|
#define ADC_PPB1RESULT_PPBRESULT_M 0xFFFFU // ADC Post Processing Block Result
|
||||||
|
#define ADC_PPB1RESULT_SIGN_S 16U
|
||||||
|
#define ADC_PPB1RESULT_SIGN_M 0xFFFF0000U // Sign Extended Bits
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB2RESULT register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB2RESULT_PPBRESULT_S 0U
|
||||||
|
#define ADC_PPB2RESULT_PPBRESULT_M 0xFFFFU // ADC Post Processing Block Result
|
||||||
|
#define ADC_PPB2RESULT_SIGN_S 16U
|
||||||
|
#define ADC_PPB2RESULT_SIGN_M 0xFFFF0000U // Sign Extended Bits
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB3RESULT register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB3RESULT_PPBRESULT_S 0U
|
||||||
|
#define ADC_PPB3RESULT_PPBRESULT_M 0xFFFFU // ADC Post Processing Block Result
|
||||||
|
#define ADC_PPB3RESULT_SIGN_S 16U
|
||||||
|
#define ADC_PPB3RESULT_SIGN_M 0xFFFF0000U // Sign Extended Bits
|
||||||
|
|
||||||
|
//*************************************************************************************************
|
||||||
|
//
|
||||||
|
// The following are defines for the bit fields in the ADCPPB4RESULT register
|
||||||
|
//
|
||||||
|
//*************************************************************************************************
|
||||||
|
#define ADC_PPB4RESULT_PPBRESULT_S 0U
|
||||||
|
#define ADC_PPB4RESULT_PPBRESULT_M 0xFFFFU // ADC Post Processing Block Result
|
||||||
|
#define ADC_PPB4RESULT_SIGN_S 16U
|
||||||
|
#define ADC_PPB4RESULT_SIGN_M 0xFFFF0000U // Sign Extended Bits
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#endif
|
||||||
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Reference in New Issue